| /freebsd-12.1/contrib/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineShifts.cpp | 515 Value *NewShift = in FoldShiftByConstant() local
517 NewShift->takeName(Op0BO); in FoldShiftByConstant()
519 return BinaryOperator::Create(Op0BO->getOpcode(), NewShift, in FoldShiftByConstant()
533 NewShift->takeName(Op0BO); in FoldShiftByConstant()
535 return BinaryOperator::CreateSub(NewRHS, NewShift); in FoldShiftByConstant()
559 Value *NewShift = in FoldShiftByConstant() local
561 Value *NewOp = Builder.CreateBinOp(TBO->getOpcode(), NewShift, in FoldShiftByConstant()
563 return SelectInst::Create(Cond, NewOp, NewShift); in FoldShiftByConstant()
578 Value *NewShift = in FoldShiftByConstant() local
580 Value *NewOp = Builder.CreateBinOp(FBO->getOpcode(), NewShift, in FoldShiftByConstant()
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| H A D | InstCombineCompares.cpp | 1610 Value *NewShift = in foldICmpAndShift() local
1615 Value *NewAnd = Builder.CreateAnd(Shift->getOperand(0), NewShift); in foldICmpAndShift()
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 3007 SDValue NewShift = DAG.getNode(ISD::SHL, SL, MVT::i32, Lo, ShiftAmt); in performShlCombine() local
3011 SDValue Vec = DAG.getBuildVector(MVT::v2i32, SL, {Zero, NewShift}); in performShlCombine()
3031 SDValue NewShift = DAG.getNode(ISD::SRA, SL, MVT::i32, Hi, in performSraCombine() local
3034 SDValue BuildVec = DAG.getBuildVector(MVT::v2i32, SL, {Hi, NewShift}); in performSraCombine()
3041 SDValue NewShift = DAG.getNode(ISD::SRA, SL, MVT::i32, Hi, in performSraCombine() local
3043 SDValue BuildVec = DAG.getBuildVector(MVT::v2i32, SL, {NewShift, NewShift}); in performSraCombine()
3078 SDValue NewShift = DAG.getNode(ISD::SRL, SL, MVT::i32, Hi, NewConst); in performSrlCombine() local
3080 SDValue BuildPair = DAG.getBuildVector(MVT::v2i32, SL, {NewShift, Zero}); in performSrlCombine()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 1359 SDValue NewShift = DAG.getNode(ISD::SHL, DL, VT, NewAnd, Shift.getOperand(1)); in foldMaskedShiftToScaledMask() local
1368 insertDAGNode(DAG, N, NewShift); in foldMaskedShiftToScaledMask()
1369 DAG.ReplaceAllUsesWith(N, NewShift); in foldMaskedShiftToScaledMask()
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| H A D | X86ISelLowering.cpp | 32649 SDValue NewShift = TLO.DAG.getNode( in SimplifyDemandedBitsForTargetNode() local
32652 return TLO.CombineTo(Op, NewShift); in SimplifyDemandedBitsForTargetNode()
35646 SDValue NewShift = DAG.getNode(ISD::SRL, DL, VT, N0.getOperand(0), N1); in combineShiftRightLogical() local
35647 return DAG.getNode(ISD::AND, DL, VT, NewShift, NewMask); in combineShiftRightLogical()
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 2017 SDValue NewShift = DAG.getNode(ShOpcode, DL, VT, Not.getOperand(0), ShAmt); in foldAddSubOfSignBit() local
2019 return DAG.getNode(ISD::ADD, DL, VT, NewShift, DAG.getConstant(NewC, DL, VT)); in foldAddSubOfSignBit()
6385 SDValue NewShift = DAG.getNode(N->getOpcode(), in visitShiftByConstant() local
6390 return DAG.getNode(LHS->getOpcode(), SDLoc(N), VT, NewShift, NewRHS); in visitShiftByConstant()
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