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Searched refs:MulVal (Results 1 – 4 of 4) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/Transforms/InstCombine/
H A DInstCombineCompares.cpp3930 static Instruction *processUMulZExtIdiom(ICmpInst &I, Value *MulVal, in processUMulZExtIdiom() argument
3934 if (!isa<IntegerType>(MulVal->getType())) in processUMulZExtIdiom()
3937 assert(I.getOperand(0) == MulVal || I.getOperand(1) == MulVal); in processUMulZExtIdiom()
3939 auto *MulInstr = dyn_cast<Instruction>(MulVal); in processUMulZExtIdiom()
3967 if (MulVal->hasNUsesOrMore(2)) in processUMulZExtIdiom()
3968 for (User *U : MulVal->users()) { in processUMulZExtIdiom()
4017 if (ValToMask != MulVal) in processUMulZExtIdiom()
4095 if (MulVal->hasNUsesOrMore(2)) { in processUMulZExtIdiom()
4097 for (auto UI = MulVal->user_begin(), UE = MulVal->user_end(); UI != UE;) { in processUMulZExtIdiom()
4136 if (I.getOperand(0) == MulVal) in processUMulZExtIdiom()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp1684 SDValue MulVal = N.getOperand(0); in matchAddressRecursively() local
1690 if (MulVal.getNode()->getOpcode() == ISD::ADD && MulVal.hasOneUse() && in matchAddressRecursively()
1691 isa<ConstantSDNode>(MulVal.getOperand(1))) { in matchAddressRecursively()
1692 Reg = MulVal.getOperand(0); in matchAddressRecursively()
1694 cast<ConstantSDNode>(MulVal.getOperand(1)); in matchAddressRecursively()
/freebsd-12.1/contrib/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp4406 APInt MulVal = APInt(BitWidth, 1) << ShiftAmt; in TryMULWIDECombine() local
4407 RHS = DCI.DAG.getConstant(MulVal, DL, MulType); in TryMULWIDECombine()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp6992 SDValue MulVal = DAG.getNode(ISD::FMUL, DL, VT, Arg, OneOver2Pi); in LowerTrig() local
6993 TrigVal = DAG.getNode(AMDGPUISD::FRACT, DL, VT, MulVal); in LowerTrig()