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Searched refs:MinVT (Results 1 – 6 of 6) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp1374 MVT MinVT = TLI.getRegisterType(ReturnType->getContext(), MVT::i32); in GetReturnInfo() local
1375 if (VT.bitsLT(MinVT)) in GetReturnInfo()
1376 VT = MinVT; in GetReturnInfo()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DTargetLowering.h3420 EVT MinVT = getRegisterType(Context, MVT::i32); in getTypeForExtReturn() local
3421 return VT.bitsLT(MinVT) ? MinVT : VT; in getTypeForExtReturn()
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp2325 EVT MinVT = EVT::getIntegerVT(*DAG.getContext(), MinBits); in SimplifySetCC() local
2326 if (isTypeDesirableForOp(ISD::SETCC, MinVT)) { in SimplifySetCC()
2328 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, MinVT, PreExt); in SimplifySetCC()
2333 SDValue C = DAG.getConstant(C1.trunc(MinBits), dl, MinVT); in SimplifySetCC()
H A DDAGCombiner.cpp8888 EVT MinVT = N0.getValueType(); in visitZERO_EXTEND() local
8896 Op = DAG.getZeroExtendInReg(Op, SDLoc(N), MinVT.getScalarType()); in visitZERO_EXTEND()
8908 SDValue And = DAG.getZeroExtendInReg(Op, SDLoc(N), MinVT.getScalarType()); in visitZERO_EXTEND()
16816 EVT MinVT = SVT; in visitCONCAT_VECTORS() local
16824 MinVT = (!FoundMinVT || OpSVT.bitsLE(MinVT)) ? OpSVT : MinVT; in visitCONCAT_VECTORS()
16835 Opnds.append(NumElts, DAG.getUNDEF(MinVT)); in visitCONCAT_VECTORS()
16844 DAG.getNode(ISD::TRUNCATE, SDLoc(N), MinVT, Op.getOperand(i))); in visitCONCAT_VECTORS()
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp3791 EVT MinVT = getRegisterType(Context, Cond ? MVT::i64 : MVT::i32); in getTypeForExtReturn() local
3792 return VT.bitsLT(MinVT) ? MinVT : VT; in getTypeForExtReturn()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp2679 EVT MinVT = getRegisterType(Context, ReturnMVT); in getTypeForExtReturn() local
2680 return VT.bitsLT(MinVT) ? MinVT : VT; in getTypeForExtReturn()