Searched refs:MinPos (Results 1 – 2 of 2) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | SIMachineScheduler.cpp | 1839 unsigned MinPos = 0; in moveLowLatencies() local
1849 if (PredPos >= MinPos) in moveLowLatencies()
1850 MinPos = PredPos + 1; in moveLowLatencies()
1857 if (BestPos < MinPos) in moveLowLatencies()
1858 BestPos = MinPos; in moveLowLatencies()
1884 if (MinPos < i) { in moveLowLatencies()
1885 for (unsigned u = i; u > MinPos; --u) { in moveLowLatencies()
1889 ScheduledSUnits[MinPos] = SU->NodeNum; in moveLowLatencies()
1890 ScheduledSUnitsInv[SU->NodeNum] = MinPos; in moveLowLatencies()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 33437 SDValue MinPos = Src; in combineHorizontalMinMaxResult() local
33445 SDValue Lo = extractSubVector(MinPos, 0, DAG, DL, SubSizeInBits); in combineHorizontalMinMaxResult()
33447 MinPos = DAG.getNode(BinOp, DL, SrcVT, Lo, Hi); in combineHorizontalMinMaxResult()
33465 MinPos = DAG.getNode(ISD::XOR, DL, SrcVT, Mask, MinPos); in combineHorizontalMinMaxResult()
33473 SrcVT, DL, MinPos, DAG.getConstant(0, DL, MVT::v16i8), in combineHorizontalMinMaxResult()
33475 MinPos = DAG.getNode(ISD::UMIN, DL, SrcVT, MinPos, Upper); in combineHorizontalMinMaxResult()
33479 MinPos = DAG.getBitcast(MVT::v8i16, MinPos); in combineHorizontalMinMaxResult()
33480 MinPos = DAG.getNode(X86ISD::PHMINPOS, DL, MVT::v8i16, MinPos); in combineHorizontalMinMaxResult()
33481 MinPos = DAG.getBitcast(SrcVT, MinPos); in combineHorizontalMinMaxResult()
33484 MinPos = DAG.getNode(ISD::XOR, DL, SrcVT, Mask, MinPos); in combineHorizontalMinMaxResult()
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