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Searched refs:MachineInstr (Results 1 – 25 of 617) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.h35 class MachineInstr; variable
73 const MachineInstr &MI,
80 const MachineInstr &MI,
144 MachineInstr *IndVar, MachineInstr &Cmp,
251 bool DefinesPredicate(MachineInstr &MI,
299 areMemAccessesTriviallyDisjoint(MachineInstr &MIa, MachineInstr &MIb,
365 bool isDuplexPair(const MachineInstr &MIa, const MachineInstr &MIb) const;
401 bool isSolo(const MachineInstr &MI) const;
403 bool isTC1(const MachineInstr &MI) const;
404 bool isTC2(const MachineInstr &MI) const;
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H A DHexagonVLIWPacketizer.h24 class MachineInstr; variable
30 std::vector<MachineInstr *> OldPacketMIs;
132 bool useCallersSP(MachineInstr &MI);
133 void useCalleesSP(MachineInstr &MI);
136 bool arePredicatesComplements(MachineInstr &MI1, MachineInstr &MI2);
139 bool isCurifiable(MachineInstr &MI);
140 bool cannotCoexist(const MachineInstr &MI, const MachineInstr &MJ);
149 bool hasDeadDependence(const MachineInstr &I, const MachineInstr &J);
150 bool hasControlDependence(const MachineInstr &I, const MachineInstr &J);
151 bool hasRegMaskDependence(const MachineInstr &I, const MachineInstr &J);
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/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h129 virtual MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
399 MachineInstr *
827 virtual MachineInstr *optimizeSelect(MachineInstr &MI,
929 MachineInstr *foldMemoryOperand(MachineInstr &MI, ArrayRef<unsigned> Ops,
935 MachineInstr *foldMemoryOperand(MachineInstr &MI, ArrayRef<unsigned> Ops,
947 MachineInstr &Root,
992 void reassociateOps(MachineInstr &Root, MachineInstr &Prev,
1017 virtual MachineInstr *
1314 virtual MachineInstr *optimizeLoadInstr(MachineInstr &MI, in optimizeLoadInstr()
1327 virtual bool FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, in FoldImmediate()
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H A DLiveVariables.h89 std::vector<MachineInstr*> Kills;
94 bool removeKill(MachineInstr &MI) { in removeKill()
136 std::vector<MachineInstr *> PhysRegDef;
141 std::vector<MachineInstr *> PhysRegUse;
147 DenseMap<MachineInstr*, unsigned> DistanceMap;
157 void HandlePhysRegUse(unsigned Reg, MachineInstr &MI);
158 void HandlePhysRegDef(unsigned Reg, MachineInstr *MI,
164 MachineInstr *FindLastRefOrPartRef(unsigned Reg);
169 MachineInstr *FindLastPartialDef(unsigned Reg,
195 MachineInstr &NewMI);
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/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.h81 void swapOperands(MachineInstr &Inst) const;
93 MachineInstr &Inst,
97 MachineInstr &Inst,
131 bool checkInstOffsetsDoNotOverlap(MachineInstr &MIa, MachineInstr &MIb) const;
136 bool swapSourceModifiers(MachineInstr &MI,
140 MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
297 areMemAccessesTriviallyDisjoint(MachineInstr &MIa, MachineInstr &MIb,
302 bool FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, unsigned Reg,
717 bool canShrink(const MachineInstr &MI,
720 MachineInstr *buildShrunkInst(MachineInstr &MI,
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H A DGCNHazardRecognizer.h25 class MachineInstr; variable
37 MachineInstr *CurrCycleInstr;
38 std::list<MachineInstr*> EmittedInstrs;
55 void addClauseInst(const MachineInstr &MI);
64 int checkSMRDHazards(MachineInstr *SMRD);
65 int checkVMEMHazards(MachineInstr* VMEM);
66 int checkDPPHazards(MachineInstr *DPP);
71 int checkVALUHazards(MachineInstr *VALU);
74 int checkRFEHazards(MachineInstr *RFE);
75 int checkInlineAsmHazards(MachineInstr *IA);
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H A DR600InstrInfo.h36 class MachineInstr; variable
96 bool isTransOnly(const MachineInstr &MI) const;
98 bool isVectorOnly(const MachineInstr &MI) const;
102 bool usesVertexCache(const MachineInstr &MI) const;
107 bool usesAddressRegister(MachineInstr &MI) const;
109 bool readsLDSSrcReg(const MachineInstr &MI) const;
121 getSrcs(MachineInstr &MI) const;
158 bool isVector(const MachineInstr &MI) const;
198 bool DefinesPredicate(MachineInstr &MI,
204 bool PredicateInstruction(MachineInstr &MI,
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H A DAMDGPUInstructionSelector.h36 class MachineInstr; variable
54 const MachineInstr &GEP;
58 GEPInfo(const MachineInstr &GEP) : GEP(GEP), Imm(0) { } in GEPInfo()
65 bool selectCOPY(MachineInstr &I) const;
66 bool selectG_CONSTANT(MachineInstr &I) const;
67 bool selectG_ADD(MachineInstr &I) const;
68 bool selectG_GEP(MachineInstr &I) const;
69 bool selectG_IMPLICIT_DEF(MachineInstr &I) const;
71 bool selectG_INTRINSIC_W_SIDE_EFFECTS(MachineInstr &I,
77 bool selectG_LOAD(MachineInstr &I) const;
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H A DGCNHazardRecognizer.cpp125 MachineInstr *MI = SU->getInstr(); in getHazardType()
270 function_ref<bool(MachineInstr *)> IsHazard) { in getWaitStatesSince()
272 for (MachineInstr *MI : EmittedInstrs) { in getWaitStatesSince()
298 function_ref<bool(MachineInstr *)> IsHazard) { in getWaitStatesSinceSetReg()
299 auto IsHazardFn = [IsHazard] (MachineInstr *MI) { in getWaitStatesSinceSetReg()
351 for (MachineInstr *MI : EmittedInstrs) { in checkSoftClauseHazards()
500 auto IsHazardFn = [TII, HWReg] (MachineInstr *MI) { in checkSetRegHazards()
634 auto IsHazardFn = [TII] (MachineInstr *MI) { in checkRWLaneHazards()
651 auto IsHazardFn = [TII] (MachineInstr *MI) { in checkRFEHazards()
674 auto IsHazardFn = [] (MachineInstr *MI) { in checkAnyInstHazards()
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/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86InstrInfo.h36 AC_EVEX_2_VEX = MachineInstr::TAsmComments
248 const MachineInstr &Orig,
387 MachineInstr *
396 MachineInstr *foldMemoryOperandImpl(
460 bool hasLiveCondCodeDef(MachineInstr &MI) const;
485 MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
507 void setSpecialOperandAttr(MachineInstr &OldMI1, MachineInstr &OldMI2,
508 MachineInstr &NewMI1,
533 MachineInstr *optimizeLoadInstr(MachineInstr &MI,
576 MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
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H A DX86AsmPrinter.h84 void LowerSTACKMAP(const MachineInstr &MI);
85 void LowerPATCHPOINT(const MachineInstr &MI, X86MCInstLower &MCIL);
86 void LowerSTATEPOINT(const MachineInstr &MI, X86MCInstLower &MCIL);
87 void LowerFAULTING_OP(const MachineInstr &MI, X86MCInstLower &MCIL);
93 void LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI,
98 void LowerPATCHABLE_TYPED_EVENT_CALL(const MachineInstr &MI,
101 void LowerFENTRY_CALL(const MachineInstr &MI, X86MCInstLower &MCIL);
104 void EmitSEHInstruction(const MachineInstr *MI);
119 void EmitInstruction(const MachineInstr *MI) override;
126 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.h60 const MachineInstr &MI, unsigned DefIdx,
100 MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
157 bool PredicateInstruction(MachineInstr &MI,
163 bool DefinesPredicate(MachineInstr &MI,
228 const MachineInstr &Orig,
231 MachineInstr &
239 bool produceSameValue(const MachineInstr &MI0, const MachineInstr &MI1,
299 bool analyzeSelect(const MachineInstr &MI,
303 MachineInstr *optimizeSelect(MachineInstr &MI,
309 bool FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, unsigned Reg,
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H A DA15SDOptimizer.cpp62 bool runOnInstruction(MachineInstr *MI);
99 bool hasPartialWrite(MachineInstr *MI);
107 MachineInstr *elideCopies(MachineInstr *MI);
127 std::set<MachineInstr *> DeadInstr;
180 SmallVector<MachineInstr *, 8> Front; in eraseInstrWithNoUses()
343 MachineInstr *A15SDOptimizer::elideCopies(MachineInstr *MI) { in elideCopies()
360 std::set<MachineInstr *> Reached; in elideCopiesAndPHIs()
361 SmallVector<MachineInstr *, 8> Front; in elideCopiesAndPHIs()
614 for (MachineInstr *MI : DefSrcs) { in runOnInstruction()
677 for (MachineInstr &MI : MBB) { in runOnMachineFunction()
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H A DARMAsmPrinter.h79 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
82 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
89 void EmitJumpTableAddrs(const MachineInstr *MI);
90 void EmitJumpTableInsts(const MachineInstr *MI);
92 void EmitInstruction(const MachineInstr *MI) override;
115 void LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI);
116 void LowerPATCHABLE_FUNCTION_EXIT(const MachineInstr &MI);
117 void LowerPATCHABLE_TAIL_CALL(const MachineInstr &MI);
120 void EmitSled(const MachineInstr &MI, SledKind Kind);
128 void EmitUnwindingInstruction(const MachineInstr *MI);
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/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.h144 MachineInstr *getForwardingDefMI(MachineInstr &MI,
179 MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
214 const MachineInstr &MI,
219 const MachineInstr &UseMI,
229 const MachineInstr &DefMI, in hasLowDefLatency()
245 MachineInstr &Root,
312 bool FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, unsigned Reg,
345 bool PredicateInstruction(MachineInstr &MI,
351 bool DefinesPredicate(MachineInstr &MI,
396 bool isTOCSaveMI(const MachineInstr &MI) const;
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/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.h57 areMemAccessesTriviallyDisjoint(MachineInstr &MIa, MachineInstr &MIb,
66 static bool isGPRZero(const MachineInstr &MI);
69 static bool isGPRCopy(const MachineInstr &MI);
72 static bool isFPRCopy(const MachineInstr &MI);
83 static bool isUnscaledLdSt(MachineInstr &MI) { in isUnscaledLdSt()
98 static void suppressLdStPair(MachineInstr &MI);
149 MachineInstr *
207 MachineInstr &Root,
216 SmallVectorImpl<MachineInstr *> &InsInstrs,
217 SmallVectorImpl<MachineInstr *> &DelInstrs,
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/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.h153 void expandRIEPseudo(MachineInstr &MI, unsigned LowOpcode,
163 void expandLoadStackGuard(MachineInstr *MI) const;
185 MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
193 unsigned isLoadFromStackSlot(const MachineInstr &MI,
195 unsigned isStoreToStackSlot(const MachineInstr &MI,
217 bool FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, unsigned Reg,
230 bool PredicateInstruction(MachineInstr &MI,
246 MachineInstr &MI,
248 MachineInstr *
253 MachineInstr *foldMemoryOperandImpl(
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H A DSystemZElimCompare.cpp85 bool convertToBRCT(MachineInstr &MI, MachineInstr &Compare,
87 bool convertToLoadAndTrap(MachineInstr &MI, MachineInstr &Compare,
89 bool convertToLoadAndTest(MachineInstr &MI, MachineInstr &Compare,
91 bool adjustCCMasksForInstr(MachineInstr &MI, MachineInstr &Compare,
194 MachineInstr &MI, MachineInstr &Compare, in convertToBRCT()
248 MachineInstr &MI, MachineInstr &Compare, in convertToLoadAndTrap()
288 MachineInstr &MI, MachineInstr &Compare, in convertToLoadAndTest()
313 MachineInstr &MI, MachineInstr &Compare, in adjustCCMasksForInstr()
425 MachineInstr &Compare, SmallVectorImpl<MachineInstr *> &CCUsers) { in optimizeCompareZero()
437 MachineInstr &MI = *MBBI++; in optimizeCompareZero()
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/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DImplicitNullChecks.cpp83 static bool canHandle(const MachineInstr *MI);
88 bool canReorder(const MachineInstr *A, const MachineInstr *B);
123 MachineInstr *MemOperation;
126 MachineInstr *CheckOperation;
139 MachineInstr *OnlyDependency;
142 explicit NullCheck(MachineInstr *memOperation, MachineInstr *checkOperation, in NullCheck()
146 MachineInstr *onlyDependency) in NullCheck()
171 MachineInstr *insertFaultingInstr(MachineInstr *MI, MachineBasicBlock *MBB,
184 AliasResult areMemoryOpsAliased(MachineInstr &MI, MachineInstr *PrevMI);
579 SmallVector<MachineInstr *, 8> InstsSeenSoFar; in analyzeBlockForNullChecks()
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H A DMachineInstr.cpp116 MachineInstr::MachineInstr(MachineFunction &MF, const MCInstrDesc &tid, in MachineInstr() function in MachineInstr
134 MachineInstr::MachineInstr(MachineFunction &MF, const MachineInstr &MI) in MachineInstr() function in MachineInstr
368 void MachineInstr::cloneMemRefs(MachineFunction &MF, const MachineInstr &MI) { in cloneMemRefs()
516 uint16_t MachineInstr::mergeFlagsWith(const MachineInstr &Other) const { in mergeFlagsWith()
573 bool MachineInstr::isIdenticalTo(const MachineInstr &Other, in isIdenticalTo()
648 MachineInstr *MachineInstr::removeFromParent() { in removeFromParent()
653 MachineInstr *MachineInstr::removeFromBundle() { in removeFromBundle()
669 MachineInstr *MI = (MachineInstr *)this; in eraseFromParentAndMarkDBGValuesForRemoval()
1177 bool MachineInstr::mayAlias(AliasAnalysis *AA, MachineInstr &Other, in mayAlias()
1507 if (getFlag(MachineInstr::FmNsz)) in print()
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H A DMachineCombiner.cpp92 unsigned getLatency(MachineInstr *Root, MachineInstr *NewRoot,
108 getLatenciesForInstrSequences(MachineInstr &MI,
139 MachineInstr *DefInstr = nullptr; in getOperandDef()
217 unsigned MachineCombiner::getLatency(MachineInstr *Root, MachineInstr *NewRoot, in getLatency()
236 MachineInstr *UseMO = RI->getParent(); in getLatency()
276 MachineInstr &MI, SmallVectorImpl<MachineInstr *> &InsInstrs, in getLatenciesForInstrSequences()
277 SmallVectorImpl<MachineInstr *> &DelInstrs, in getLatenciesForInstrSequences()
282 MachineInstr *NewRoot = InsInstrs.back(); in getLatenciesForInstrSequences()
359 SmallVectorImpl<MachineInstr *> &Instrs, in instr2instrSC()
468 SmallVector<MachineInstr *, 16> InsInstrs; in verifyPatternOrder()
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/freebsd-12.1/contrib/llvm/lib/Target/WebAssembly/
H A DWebAssemblyUtilities.h27 bool isArgument(const MachineInstr &MI);
28 bool isCopy(const MachineInstr &MI);
29 bool isTee(const MachineInstr &MI);
31 bool isCallDirect(const MachineInstr &MI);
32 bool isCallIndirect(const MachineInstr &MI);
33 bool isMarker(const MachineInstr &MI);
34 bool isThrow(const MachineInstr &MI);
35 bool isRethrow(const MachineInstr &MI);
36 bool isCatch(const MachineInstr &MI);
37 bool mayThrow(const MachineInstr &MI);
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/freebsd-12.1/contrib/llvm/lib/Target/RISCV/
H A DRISCVMergeBaseOffset.cpp44 bool detectLuiAddiGlobal(MachineInstr &LUI, MachineInstr *&ADDI);
46 bool detectAndFoldOffset(MachineInstr &HiLUI, MachineInstr &LoADDI);
47 void foldOffset(MachineInstr &HiLUI, MachineInstr &LoADDI, MachineInstr &Tail,
63 std::set<MachineInstr *> DeadInstrs;
103 void RISCVMergeBaseOffsetOpt::foldOffset(MachineInstr &HiLUI, in foldOffset()
104 MachineInstr &LoADDI, in foldOffset()
147 MachineInstr &OffsetTail = *MRI->getVRegDef(Reg); in matchLargeOffset()
155 MachineInstr &OffsetLui = in matchLargeOffset()
185 MachineInstr &Tail = *MRI->use_begin(DestReg)->getParent(); in detectAndFoldOffset()
267 for (MachineInstr &HiLUI : MBB) { in runOnMachineFunction()
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/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.h24 class MachineInstr; variable
53 EmitInstrWithCustomInserter(MachineInstr &MI,
90 MachineBasicBlock *emitBPOSGE32(MachineInstr &MI,
96 MachineBasicBlock *emitCOPY_FW(MachineInstr &MI,
99 MachineBasicBlock *emitCOPY_FD(MachineInstr &MI,
102 MachineBasicBlock *emitINSERT_FW(MachineInstr &MI,
105 MachineBasicBlock *emitINSERT_FD(MachineInstr &MI,
113 MachineBasicBlock *emitFILL_FW(MachineInstr &MI,
116 MachineBasicBlock *emitFILL_FD(MachineInstr &MI,
119 MachineBasicBlock *emitFEXP2_W_1(MachineInstr &MI,
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H A DMipsAsmPrinter.h35 class MachineInstr; variable
46 void EmitInstrWithMacroNoAT(const MachineInstr *MI);
54 void LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI);
55 void LowerPATCHABLE_FUNCTION_EXIT(const MachineInstr &MI);
56 void LowerPATCHABLE_TAIL_CALL(const MachineInstr &MI);
70 void EmitSled(const MachineInstr &MI, SledKind Kind);
74 const MachineInstr *MI);
80 const MachineInstr *MI);
138 void EmitInstruction(const MachineInstr *MI) override;
148 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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