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Searched refs:MLX5_GET (Results 1 – 25 of 33) sorted by relevance

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/freebsd-12.1/sys/dev/mlx5/mlx5_ib/
H A Dmlx5_ib_cong.c95 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
98 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
101 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
104 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
107 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
110 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
113 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
116 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
119 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
122 return MLX5_GET(cong_control_r_roce_ecn_rp, field, in mlx5_get_cc_param_val()
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H A Dmlx5_ib_qp.c1089 MLX5_SET(sqc, sqc, cqn, MLX5_GET(qpc, qpc, cqn_snd)); in create_raw_packet_qp_sq()
1095 MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); in create_raw_packet_qp_sq()
1096 MLX5_SET(wq, wq, uar_page, MLX5_GET(qpc, qpc, uar_page)); in create_raw_packet_qp_sq()
1132 u32 log_rq_stride = MLX5_GET(qpc, qpc, log_rq_stride); in get_rq_pas_size()
1133 u32 log_rq_size = MLX5_GET(qpc, qpc, log_rq_size); in get_rq_pas_size()
1134 u32 page_offset = MLX5_GET(qpc, qpc, page_offset); in get_rq_pas_size()
1169 MLX5_SET(rqc, rqc, cqn, MLX5_GET(qpc, qpc, cqn_rcv)); in create_raw_packet_qp_rq()
1177 MLX5_GET(qpc, qpc, end_padding_mode)); in create_raw_packet_qp_rq()
1179 MLX5_SET(wq, wq, pd, MLX5_GET(qpc, qpc, pd)); in create_raw_packet_qp_rq()
4309 *sq_state = MLX5_GET(sqc, sqc, state); in query_raw_packet_qp_sq_state()
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H A Dmlx5_ib_main.c933 props->lid = MLX5_GET(hca_vport_context, ctx, lid); in mlx5_query_hca_port()
934 props->lmc = MLX5_GET(hca_vport_context, ctx, lmc); in mlx5_query_hca_port()
935 props->sm_lid = MLX5_GET(hca_vport_context, ctx, sm_lid); in mlx5_query_hca_port()
936 props->sm_sl = MLX5_GET(hca_vport_context, ctx, sm_sl); in mlx5_query_hca_port()
937 props->state = MLX5_GET(hca_vport_context, ctx, vport_state); in mlx5_query_hca_port()
938 props->phys_state = MLX5_GET(hca_vport_context, ctx, in mlx5_query_hca_port()
940 props->port_cap_flags = MLX5_GET(hca_vport_context, ctx, cap_mask1); in mlx5_query_hca_port()
944 props->bad_pkey_cntr = MLX5_GET(hca_vport_context, ctx, in mlx5_query_hca_port()
946 props->qkey_viol_cntr = MLX5_GET(hca_vport_context, ctx, in mlx5_query_hca_port()
948 props->subnet_timeout = MLX5_GET(hca_vport_context, ctx, in mlx5_query_hca_port()
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/freebsd-12.1/sys/dev/mlx5/
H A Ddevice.h96 u32 ___t = MLX5_GET(typ, p, fld); \
984 MLX5_GET(flow_table_eswitch_cap, \
988 MLX5_GET(flow_table_eswitch_cap, \
1010 MLX5_GET(e_switch_cap, \
1014 MLX5_GET(e_switch_cap, \
1024 MLX5_GET(snapshot_cap, \
1028 MLX5_GET(snapshot_cap, \
1040 MLX5_GET(debug_cap, \
1044 MLX5_GET(debug_cap, \
1048 MLX5_GET(qos_cap,\
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H A Dport.h219 ((ext) ? MLX5_GET(reg, out, ext_##field) : \
220 MLX5_GET(reg, out, field))
/freebsd-12.1/sys/dev/mlx5/mlx5_core/
H A Dmlx5_port.c316 *status = MLX5_GET(paos_reg, out, oper_status); in mlx5_query_port_status()
352 *max_mtu = MLX5_GET(pmtu_reg, out, max_mtu); in mlx5_query_port_mtu()
354 *oper_mtu = MLX5_GET(pmtu_reg, out, oper_mtu); in mlx5_query_port_mtu()
419 *rx_pause = MLX5_GET(pfcc_reg, out, pprx); in mlx5_query_port_pause()
420 *tx_pause = MLX5_GET(pfcc_reg, out, pptx); in mlx5_query_port_pause()
438 *pfc_en_tx = MLX5_GET(pfcc_reg, out, pfctx); in mlx5_query_port_pfc()
440 *pfc_en_rx = MLX5_GET(pfcc_reg, out, pfcrx); in mlx5_query_port_pfc()
595 ptys->eth_proto_cap = MLX5_GET(ptys_reg, out, in mlx5_core_access_ptys()
599 ptys->ib_proto_cap = MLX5_GET(ptys_reg, out, in mlx5_core_access_ptys()
724 status = MLX5_GET(mcia_reg, out, status); in mlx5_query_eeprom()
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H A Dmlx5_srq.c88 if (MLX5_GET(wq, wq, wq_signature)) in get_wq()
90 in->log_page_size = MLX5_GET(wq, wq, log_wq_pg_sz); in get_wq()
91 in->wqe_shift = MLX5_GET(wq, wq, log_wq_stride) - 4; in get_wq()
92 in->log_size = MLX5_GET(wq, wq, log_wq_sz); in get_wq()
93 in->page_offset = MLX5_GET(wq, wq, page_offset); in get_wq()
94 in->lwm = MLX5_GET(wq, wq, lwm); in get_wq()
95 in->pd = MLX5_GET(wq, wq, pd); in get_wq()
101 if (MLX5_GET(srqc, srqc, wq_signature)) in get_srqc()
105 in->log_size = MLX5_GET(srqc, srqc, log_srq_size); in get_srqc()
107 in->lwm = MLX5_GET(srqc, srqc, lwm); in get_srqc()
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H A Dmlx5_wq.c69 wq->log_stride = MLX5_GET(wq, wqc, log_wq_stride); in mlx5_wq_cyc_create()
70 wq->sz_m1 = (1 << MLX5_GET(wq, wqc, log_wq_sz)) - 1; in mlx5_wq_cyc_create()
106 wq->log_stride = 6 + MLX5_GET(cqc, cqc, cqe_sz); in mlx5_cqwq_create()
107 wq->log_sz = MLX5_GET(cqc, cqc, log_cq_size); in mlx5_cqwq_create()
146 wq->log_stride = MLX5_GET(wq, wqc, log_wq_stride); in mlx5_wq_ll_create()
147 wq->sz_m1 = (1 << MLX5_GET(wq, wqc, log_wq_sz)) - 1; in mlx5_wq_ll_create()
H A Dmlx5_mr.c89 mkey_index = MLX5_GET(create_mkey_out, lout, mkey_index); in mlx5_core_create_mkey_cb()
93 mkey->pd = MLX5_GET(mkc, mkc, pd); in mlx5_core_create_mkey_cb()
168 *mkey = MLX5_GET(query_special_contexts_out, out, dump_fill_mkey); in mlx5_core_dump_fill_mkey()
177 case 1: return MLX5_GET(create_psv_out, out, psv1_index); in mlx5_get_psv()
178 case 2: return MLX5_GET(create_psv_out, out, psv2_index); in mlx5_get_psv()
179 case 3: return MLX5_GET(create_psv_out, out, psv3_index); in mlx5_get_psv()
180 default: return MLX5_GET(create_psv_out, out, psv0_index); in mlx5_get_psv()
H A Dmlx5_fw.c82 *vendor_id = MLX5_GET(query_adapter_out, out, in mlx5_core_query_vendor_id()
107 dev->special_contexts.resd_lkey = MLX5_GET(query_special_contexts_out, in mlx5_core_query_special_contexts()
278 force_state = MLX5_GET(teardown_hca_out, out, state); in mlx5_cmd_force_teardown_hca()
309 state = MLX5_GET(teardown_hca_out, out, state); in mlx5_cmd_fast_teardown_hca()
396 *update_handle = MLX5_GET(mcc_reg, out, update_handle); in mlx5_reg_mcc_query()
397 *error_code = MLX5_GET(mcc_reg, out, error_code); in mlx5_reg_mcc_query()
398 *control_state = MLX5_GET(mcc_reg, out, control_state); in mlx5_reg_mcc_query()
457 *max_component_size = MLX5_GET(mcqi_cap, out + offset, max_component_size); in mlx5_reg_mcqi_query()
458 *log_mcda_word_size = MLX5_GET(mcqi_cap, out + offset, log_mcda_word_size); in mlx5_reg_mcqi_query()
459 *mcda_max_write_size = MLX5_GET(mcqi_cap, out + offset, mcda_max_write_size); in mlx5_reg_mcqi_query()
H A Dmlx5_transobj.c44 *tdn = MLX5_GET(alloc_transport_domain_out, out, in mlx5_alloc_transport_domain()
71 *rqn = MLX5_GET(create_rq_out, out, rqn); in mlx5_core_create_rq()
116 *sqn = MLX5_GET(create_sq_out, out, sqn); in mlx5_core_create_sq()
162 *tirn = MLX5_GET(create_tir_out, out, tirn); in mlx5_core_create_tir()
188 *tisn = MLX5_GET(create_tis_out, out, tisn); in mlx5_core_create_tis()
224 *rmpn = MLX5_GET(create_rmp_out, out, rmpn); in mlx5_core_create_rmp()
298 *xsrqn = MLX5_GET(create_xrc_srq_out, out, xrc_srqn); in mlx5_core_create_xsrq()
361 *rqtn = MLX5_GET(create_rqt_out, out, rqtn); in mlx5_core_create_rqt()
H A Dmlx5_diagnostics.c192 u16 counter_id = MLX5_GET( in mlx5_core_get_diagnostics_full()
240 MLX5_GET(pcie_perf_counters, in mlx5_core_get_diagnostics_full()
243 MLX5_GET(pcie_perf_counters, in mlx5_core_get_diagnostics_full()
256 MLX5_GET(pcie_timers_states, in mlx5_core_get_diagnostics_full()
259 MLX5_GET(pcie_timers_states, in mlx5_core_get_diagnostics_full()
H A Dmlx5_vport.c62 return MLX5_GET(query_vport_state_out, out, state); in mlx5_query_vport_state()
72 return MLX5_GET(query_vport_state_out, out, admin_state); in mlx5_query_vport_admin_state()
148 *counter_set_id = MLX5_GET(alloc_q_counter_out, out, in mlx5_vport_alloc_q_counter()
206 *out_of_rx_buffer = MLX5_GET(query_q_counter_out, out, in mlx5_vport_query_out_of_rx_buffer()
219 *min_inline = MLX5_GET(query_nic_vport_context_out, out, in mlx5_query_nic_vport_min_inline()
879 vlans[i] = MLX5_GET(vlan_layout, vlan_addr, vlan); in mlx5_query_nic_vport_vlans()
951 *enable = MLX5_GET(query_nic_vport_context_out, out, in mlx5_query_nic_vport_roce_en()
1285 *min_header = MLX5_GET(query_hca_vport_context_out, out, in mlx5_query_hca_min_wqe_header()
1358 *mtu = MLX5_GET(query_nic_vport_context_out, out, in mlx5_query_vport_mtu()
1564 *value = MLX5_GET(query_nic_vport_context_out, out, in mlx5_nic_vport_query_local_lb()
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H A Dmlx5_pagealloc.c312 *npages = MLX5_GET(query_pages_out, out, num_pages); in mlx5_cmd_query_pages()
313 *func_id = MLX5_GET(query_pages_out, out, function_id); in mlx5_cmd_query_pages()
397 npages = MLX5_GET(manage_pages_in, in, input_num_entries); in reclaim_pages_cmd()
398 func_id = MLX5_GET(manage_pages_in, in, function_id); in reclaim_pages_cmd()
445 num_claimed = MLX5_GET(manage_pages_out, out, output_num_entries); in reclaim_pages()
H A Dmlx5_cmd.c678 *status = MLX5_GET(mbox_out, out, status); in mlx5_cmd_mbox_status()
679 *syndrome = MLX5_GET(mbox_out, out, syndrome); in mlx5_cmd_mbox_status()
693 opcode = MLX5_GET(mbox_in, in, opcode); in mlx5_cmd_check()
694 op_mod = MLX5_GET(mbox_in, in, op_mod); in mlx5_cmd_check()
711 u16 op = MLX5_GET(mbox_in, ent->lay->in, opcode); in dump_command()
773 return MLX5_GET(mbox_in, in->first.data, opcode); in msg_to_opcode()
1014 op = MLX5_GET(mbox_in, in->first.data, opcode); in mlx5_cmd_invoke()
1265 return MLX5_GET(mbox_in, in, opcode) == MLX5_CMD_OP_MANAGE_PAGES; in is_manage_pages()
1284 u16 opcode = MLX5_GET(mbox_in, in, opcode); in cmd_exec_helper()
H A Dmlx5_pd.c45 *pdn = MLX5_GET(alloc_pd_out, out, pd); in mlx5_core_alloc_pd()
H A Dmlx5_fs_cmd.c81 *table_id = MLX5_GET(create_flow_table_out, out, table_id); in mlx5_cmd_fs_create_ft()
131 *group_id = MLX5_GET(create_flow_group_out, out, group_id); in mlx5_cmd_fs_create_fg()
H A Dmlx5_qp.c136 qp->qpn = MLX5_GET(create_qp_out, out, qpn); in mlx5_core_create_qp()
334 *xrcdn = MLX5_GET(alloc_xrcd_out, out, xrcd); in mlx5_core_xrcd_alloc()
370 dct->dctn = MLX5_GET(create_dct_out, out, dctn); in mlx5_core_create_dct()
/freebsd-12.1/sys/dev/mlx5/mlx5_fpga/
H A Dmlx5fpga_cmd.c162 query->image_status = MLX5_GET(fpga_ctrl, out, status); in mlx5_fpga_query()
164 query->oper_image = MLX5_GET(fpga_ctrl, out, flash_select_oper); in mlx5_fpga_query()
182 status = MLX5_GET(fpga_ctrl, out, status); in mlx5_fpga_ctrl_connect()
212 temp->index = MLX5_GET(mtmp_reg, out, sensor_index); in mlx5_fpga_query_mtmp()
213 temp->temperature = MLX5_GET(mtmp_reg, out, temperature); in mlx5_fpga_query_mtmp()
214 temp->mte = MLX5_GET(mtmp_reg, out, mte); in mlx5_fpga_query_mtmp()
215 temp->max_temperature = MLX5_GET(mtmp_reg, out, max_temperature); in mlx5_fpga_query_mtmp()
216 temp->tee = MLX5_GET(mtmp_reg, out, tee); in mlx5_fpga_query_mtmp()
217 temp->temperature_threshold_hi = MLX5_GET(mtmp_reg, out, in mlx5_fpga_query_mtmp()
219 temp->temperature_threshold_lo = MLX5_GET(mtmp_reg, out, in mlx5_fpga_query_mtmp()
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H A Dmlx5fpga_ipsec.c251 if (MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, esp)) in mlx5_fpga_ipsec_device_caps()
254 if (MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, ipv6)) in mlx5_fpga_ipsec_device_caps()
257 if (MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, lso)) in mlx5_fpga_ipsec_device_caps()
270 return MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, in mlx5_fpga_ipsec_counters_count()
287 addr = (u64)MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, in mlx5_fpga_ipsec_counters_read()
289 ((u64)MLX5_GET(ipsec_extended_cap, fdev->ipsec->caps, in mlx5_fpga_ipsec_counters_read()
H A Dmlx5fpga_core.c465 syndrome = MLX5_GET(fpga_error_event, data, syndrome); in mlx5_fpga_event()
469 syndrome = MLX5_GET(fpga_qp_error_event, data, syndrome); in mlx5_fpga_event()
471 fpga_qpn = MLX5_GET(fpga_qp_error_event, data, fpga_qpn); in mlx5_fpga_event()
H A Dmlx5fpga_trans.c263 tid = MLX5_GET(fpga_shell_qp_packet, buf->sg[0].data, tid); in mlx5_fpga_trans_recv()
268 type = MLX5_GET(fpga_shell_qp_packet, buf->sg[0].data, type); in mlx5_fpga_trans_recv()
/freebsd-12.1/sys/dev/mlx5/mlx5_en/
H A Dmlx5_en_port_buffer.c54 MLX5_GET(bufferx_reg, buffer, lossy); in mlx5e_port_query_buffer()
56 MLX5_GET(bufferx_reg, buffer, epsb); in mlx5e_port_query_buffer()
58 MLX5_GET(bufferx_reg, buffer, size) << MLX5E_BUFFER_CELL_SHIFT; in mlx5e_port_query_buffer()
60 MLX5_GET(bufferx_reg, buffer, xon_threshold) << MLX5E_BUFFER_CELL_SHIFT; in mlx5e_port_query_buffer()
62 MLX5_GET(bufferx_reg, buffer, xoff_threshold) << MLX5E_BUFFER_CELL_SHIFT; in mlx5e_port_query_buffer()
74 MLX5_GET(pbmc_reg, out, port_buffer_size) << MLX5E_BUFFER_CELL_SHIFT; in mlx5e_port_query_buffer()
H A Dmlx5_en_ethtool.c372 MLX5_GET(pplm_reg, in, fec_override_admin_25g) & in mlx5e_fec_update()
373 MLX5_GET(pplm_reg, in, fec_override_admin_50g); in mlx5e_fec_update()
375 MLX5_GET(pplm_reg, in, fec_override_admin_56g); in mlx5e_fec_update()
377 MLX5_GET(pplm_reg, in, fec_override_admin_100g); in mlx5e_fec_update()
381 MLX5_GET(pplm_reg, in, fec_override_cap_10g_40g); in mlx5e_fec_update()
383 MLX5_GET(pplm_reg, in, fec_override_cap_25g) & in mlx5e_fec_update()
384 MLX5_GET(pplm_reg, in, fec_override_cap_50g); in mlx5e_fec_update()
386 MLX5_GET(pplm_reg, in, fec_override_cap_56g); in mlx5e_fec_update()
388 MLX5_GET(pplm_reg, in, fec_override_cap_100g); in mlx5e_fec_update()
402 MLX5_GET(pplm_reg, in, fec_override_cap_50g_1x); in mlx5e_fec_update()
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H A Dmlx5_en_dim.c40 switch (MLX5_GET(cqc, cqc, cq_period_mode)) { in mlx5e_dim_build_cq_param()

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