Searched refs:MFOCRF (Results 1 – 9 of 9) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCMCCodeEmitter.cpp | 242 MI.getOpcode() == PPC::MFOCRF || MI.getOpcode() == PPC::MFOCRF8) && in get_crbitm_encoding() 269 MI.getOpcode() != PPC::MFOCRF && MI.getOpcode() != PPC::MFOCRF8) || in getMachineOpValue()
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.cpp | 590 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), Reg) in lowerCRSpilling() 681 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), Reg) in lowerCRBitSpilling() 731 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), RegO) in lowerCRBitRestore()
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| H A D | PPCAsmPrinter.cpp | 1037 case PPC::MFOCRF: in EmitInstruction() 1043 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; in EmitInstruction()
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| H A D | PPC.td | 74 "Enable the MFOCRF instruction">;
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| H A D | PPCISelLowering.h | 185 MFOCRF, enumerator
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| H A D | PPCInstrInfo.cpp | 923 BuildMI(MBB, I, DL, get(PPC::MFOCRF), DestReg).addReg(CRReg); in copyPhysReg() 940 BuildMI(MBB, I, DL, get(PPC::MFOCRF), DestReg).addReg(SrcReg); in copyPhysReg()
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| H A D | PPCISelDAGToDAG.cpp | 4119 IntCR = SDValue(CurDAG->getMachineNode(PPC::MFOCRF, dl, MVT::i32, CR7Reg, in trySETCC() 4387 case PPCISD::MFOCRF: { in Select() 4389 ReplaceNode(N, CurDAG->getMachineNode(PPC::MFOCRF, dl, MVT::i32, in Select()
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| H A D | PPCISelLowering.cpp | 1308 case PPCISD::MFOCRF: return "PPCISD::MFOCRF"; in getTargetNodeName() 9059 SDValue Flags = DAG.getNode(PPCISD::MFOCRF, dl, MVT::i32, in LowerINTRINSIC_WO_CHAIN() 13239 if (FlagUser->getOpcode() == PPCISD::MFOCRF) in PerformDAGCombine()
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| H A D | PPCInstrInfo.td | 2645 def MFOCRF: XFXForm_5a<31, 19, (outs gprc:$rT), (ins crbitm:$FXM),
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