| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 247 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
258 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
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| H A D | ARMBaseInstrInfo.cpp | 1737 bool ARMBaseInstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
1743 if (!Load1->isMachineOpcode() || !Load2->isMachineOpcode()) in areLoadsFromSameBasePtr()
1746 switch (Load1->getMachineOpcode()) { in areLoadsFromSameBasePtr()
1788 if (Load1->getOperand(0) != Load2->getOperand(0) || in areLoadsFromSameBasePtr()
1789 Load1->getOperand(4) != Load2->getOperand(4)) in areLoadsFromSameBasePtr()
1793 if (Load1->getOperand(3) != Load2->getOperand(3)) in areLoadsFromSameBasePtr()
1797 if (isa<ConstantSDNode>(Load1->getOperand(1)) && in areLoadsFromSameBasePtr()
1799 Offset1 = cast<ConstantSDNode>(Load1->getOperand(1))->getSExtValue(); in areLoadsFromSameBasePtr()
1834 if ((Load1->getMachineOpcode() != Load2->getMachineOpcode()) && in shouldScheduleLoadsNear()
1835 !((Load1->getMachineOpcode() == ARM::t2LDRBi8 && in shouldScheduleLoadsNear()
[all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 427 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1,
438 bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1,
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| H A D | X86InstrInfo.cpp | 5655 X86InstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
5657 if (!Load1->isMachineOpcode() || !Load2->isMachineOpcode()) in areLoadsFromSameBasePtr()
5659 unsigned Opc1 = Load1->getMachineOpcode(); in areLoadsFromSameBasePtr()
5818 return Load1->getOperand(I) == Load2->getOperand(I); in areLoadsFromSameBasePtr()
5831 auto Disp1 = dyn_cast<ConstantSDNode>(Load1->getOperand(X86::AddrDisp)); in areLoadsFromSameBasePtr()
5841 bool X86InstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, in shouldScheduleLoadsNear() argument
5848 unsigned Opc1 = Load1->getMachineOpcode(); in shouldScheduleLoadsNear()
5863 EVT VT = Load1->getValueType(0); in shouldScheduleLoadsNear()
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| H A D | X86ISelLowering.cpp | 37275 SDValue Load1 = in combineLoad() local
37285 Load1.getValue(1), in combineLoad()
37288 SDValue NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl, RegVT, Load1, Load2); in combineLoad()
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 151 bool SIInstrInfo::areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, in areLoadsFromSameBasePtr() argument
154 if (!Load0->isMachineOpcode() || !Load1->isMachineOpcode()) in areLoadsFromSameBasePtr()
158 unsigned Opc1 = Load1->getMachineOpcode(); in areLoadsFromSameBasePtr()
167 if (getNumOperandsNoGlue(Load0) != getNumOperandsNoGlue(Load1)) in areLoadsFromSameBasePtr()
171 if (Load0->getOperand(1) != Load1->getOperand(1)) in areLoadsFromSameBasePtr()
175 if (findChainOperand(Load0) != findChainOperand(Load1)) in areLoadsFromSameBasePtr()
199 if (Load0->getOperand(0) != Load1->getOperand(0)) in areLoadsFromSameBasePtr()
205 dyn_cast<ConstantSDNode>(Load1->getOperand(1)); in areLoadsFromSameBasePtr()
211 if (findChainOperand(Load0) != findChainOperand(Load1)) in areLoadsFromSameBasePtr()
224 findChainOperand(Load0) != findChainOperand(Load1) || in areLoadsFromSameBasePtr()
[all …]
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| H A D | SIInstrInfo.h | 172 bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,
183 bool shouldScheduleLoadsNear(SDNode *Load0, SDNode *Load1, int64_t Offset0,
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1119 virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr() argument
1133 virtual bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, in shouldScheduleLoadsNear() argument
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| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 1500 SDValue Load1 = DAG.getLoad(SingleTy, dl, Chain, Base1, MOp1); in SplitHvxMemOp() local
1502 { DAG.getNode(ISD::CONCAT_VECTORS, dl, MemTy, Load0, Load1), in SplitHvxMemOp()
1504 Load0.getValue(1), Load1.getValue(1)) }, dl); in SplitHvxMemOp()
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| H A D | HexagonISelLowering.cpp | 2684 SDValue Load1 = DAG.getLoad(LoadTy, dl, Chain, Base1, WideMMO); in LowerUnalignedLoad() local
2687 {Load1, Load0, BaseNoOff.getOperand(0)}); in LowerUnalignedLoad()
2689 Load0.getValue(1), Load1.getValue(1)); in LowerUnalignedLoad()
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