| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | MachineOperand.h | 93 unsigned IsDef : 1; variable
361 return !IsDef; in isUse()
366 return IsDef; in isDef()
376 return IsDeadOrKill & IsDef; in isDead()
381 return IsDeadOrKill & !IsDef; in isKill()
490 assert(isReg() && !IsDef && "Wrong MachineOperand mutator");
496 assert(isReg() && IsDef && "Wrong MachineOperand mutator");
513 assert(isReg() && IsDef && "Wrong MachineOperand mutator");
518 assert(isReg() && !IsDef && "Wrong MachineOperand mutator");
766 Op.IsDef = isDef;
|
| /freebsd-12.1/contrib/llvm/utils/TableGen/ |
| H A D | InstrDocsEmitter.cpp | 156 bool IsDef = i < II->Operands.NumDefs; in EmitInstrDocs() local
170 OS << "* " << (IsDef ? "DEF" : "USE") << " ``" << Op.Rec->getName() in EmitInstrDocs()
181 OS << "* " << (IsDef ? "DEF" : "USE") << " ``" << Op.Rec->getName() in EmitInstrDocs()
|
| H A D | GlobalISelEmitter.cpp | 2356 bool IsDef; member in __anon7e76e5f80111::TempRegRenderer
2359 TempRegRenderer(unsigned InsnID, unsigned TempRegID, bool IsDef = false) in TempRegRenderer() argument
2361 IsDef(IsDef) {} in TempRegRenderer()
2372 if (IsDef) in emitRenderOpcodes()
|
| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | RDFDeadCode.cpp | 136 if (DFG.IsDef(RA)) in collect()
151 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(DFG.IsDef, DFG)) in collect()
226 else if (DFG.IsDef(RA)) in erase()
|
| H A D | HexagonConstExtenders.cpp | 328 bool IsDef = false; member
502 if (ED.IsDef) in operator <<()
1163 ED.IsDef = true; in recordExtender()
1183 ED.IsDef = true; in recordExtender()
1188 ED.IsDef = true; in recordExtender()
1192 ED.IsDef = true; in recordExtender()
1274 if (!ED.IsDef) in assignInits()
1294 if (ED.IsDef) in assignInits()
1832 assert((!ED.IsDef || ED.Rd.Reg != 0) && "Missing Rd for def"); in replaceInstr()
1857 if (ED.IsDef && Diff != 0) { in replaceInstr()
[all …]
|
| H A D | HexagonRDFOpt.cpp | 168 if (DFG.IsDef(RA) && DeadNodes.count(RA.Id)) in run()
258 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(DFG.IsDef, DFG)) { in rewrite()
|
| H A D | HexagonFrameLowering.h | 170 bool IsDef, bool IsKill) const;
|
| H A D | HexagonOptAddrMode.cpp | 183 if ((DFG->IsDef(AA) && AA.Id != OffsetRegRD) || in canRemoveAddasl()
246 for (NodeAddr<DefNode *> DA : SA.Addr->members_if(DFG->IsDef, *DFG)) { in getAllRealUses()
307 if ((DFG->IsDef(AA) && AA.Id != LRExtRegRD) || in isSafeToExtLR()
|
| H A D | RDFCopy.cpp | 145 for (NodeAddr<DefNode*> DA : SA.Addr->members_if(DFG.IsDef, DFG)) { in run()
|
| H A D | RDFGraph.cpp | 1065 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(IsDef, *this)) { in pushClobbers()
1111 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(IsDef, *this)) { in pushDefs()
1420 for (NodeAddr<RefNode*> RA : IA.Addr->members_if(IsDef, *this)) in recordDefsForDF()
1667 return IsDef(RA) && (RA.Addr->getFlags() & NodeAttrs::Clobbering); in linkBlockRefs()
1670 return IsDef(RA) && !(RA.Addr->getFlags() & NodeAttrs::Clobbering); in linkBlockRefs()
|
| H A D | RDFGraph.h | 798 static bool IsDef(const NodeAddr<NodeBase*> BA) { in IsDef() function
|
| H A D | HexagonFrameLowering.cpp | 2411 const CSIVect &CSI, bool IsDef, bool IsKill) const { in addCalleeSaveRegistersAsImpOperand() argument
2414 MI->addOperand(MachineOperand::CreateReg(R.getReg(), IsDef, true, IsKill)); in addCalleeSaveRegistersAsImpOperand()
|
| H A D | RDFLiveness.cpp | 348 if (DFG.IsDef(R)) { in getNearestAliasedRef()
|
| /freebsd-12.1/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.h | 33 void addDSPCtrlRegOperands(bool IsDef, MachineInstr &MI,
|
| H A D | MipsDelaySlotFiller.cpp | 132 bool IsDef) const;
432 unsigned Reg, bool IsDef) const { in checkRegDefsUses()
433 if (IsDef) { in checkRegDefsUses()
|
| H A D | MipsSEISelDAGToDAG.cpp | 52 void MipsSEDAGToDAGISel::addDSPCtrlRegOperands(bool IsDef, MachineInstr &MI, in addDSPCtrlRegOperands() argument
57 IsDef ? RegState::ImplicitDefine : RegState::Implicit | RegState::Undef; in addDSPCtrlRegOperands()
|
| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | MachineOperand.cpp | 101 if (IsDef == Val) in setIsDef()
108 IsDef = Val; in setIsDef()
112 IsDef = Val; in setIsDef()
238 IsDef = isDef; in ChangeToRegister()
|
| H A D | BranchFolding.cpp | 1931 bool IsDef = false; in findHoistingInsertPosAndDeps() local
1942 IsDef = true; in findHoistingInsertPosAndDeps()
1946 if (!IsDef) in findHoistingInsertPosAndDeps()
|
| /freebsd-12.1/contrib/llvm/lib/CodeGen/MIRParser/ |
| H A D | MIParser.cpp | 206 Optional<unsigned> &TiedDefIdx, bool IsDef = false);
1235 bool IsDef) { in parseRegisterOperand() argument
1236 unsigned Flags = IsDef ? RegState::Define : 0; in parseRegisterOperand()
|
| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86FrameLowering.cpp | 2706 bool IsDef = false; in adjustStackWithPops() local
2710 IsDef = true; in adjustStackWithPops()
2715 if (IsDef) in adjustStackWithPops()
|