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Searched refs:InstRef (Results 1 – 25 of 25) sorted by relevance

/freebsd-12.1/contrib/llvm/include/llvm/MCA/HardwareUnits/
H A DScheduler.h37 virtual bool compare(const InstRef &Lhs, const InstRef &Rhs) const = 0;
52 bool compare(const InstRef &Lhs, const InstRef &Rhs) const override { in compare()
96 std::vector<InstRef> WaitSet;
97 std::vector<InstRef> ReadySet;
98 std::vector<InstRef> IssuedSet;
107 InstRef &IR,
159 void dispatch(const InstRef &IR);
163 bool isReady(const InstRef &IR) const;
169 InstRef &IR,
171 SmallVectorImpl<InstRef> &Ready);
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H A DLSUnit.h26 class InstRef; variable
176 Status isAvailable(const InstRef &IR) const;
182 void dispatch(const InstRef &IR);
191 virtual bool isReady(const InstRef &IR) const;
201 void onInstructionExecuted(const InstRef &IR);
H A DRetireControlUnit.h53 InstRef IR;
85 unsigned reserveSlot(const InstRef &IS, unsigned NumMicroOps);
/freebsd-12.1/contrib/llvm/lib/MCA/HardwareUnits/
H A DScheduler.cpp67 InstRef &IR, in issueInstructionImpl()
88 InstRef &IR, in issueInstruction()
109 InstRef &IR = *I; in promoteToReadySet()
136 InstRef Scheduler::select() { in select()
139 const InstRef &IR = ReadySet[I]; in select()
149 return InstRef(); in select()
152 InstRef IR = ReadySet[QueueIndex]; in select()
161 InstRef &IR = *I; in updateIssuedSet()
190 for (InstRef &IR : IssuedSet) in cycleEvent()
195 for (InstRef &IR : WaitSet) in cycleEvent()
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H A DLSUnit.cpp69 void LSUnit::dispatch(const InstRef &IR) { in dispatch()
88 LSUnit::Status LSUnit::isAvailable(const InstRef &IR) const { in isAvailable()
97 bool LSUnit::isReady(const InstRef &IR) const { in isReady()
155 void LSUnit::onInstructionExecuted(const InstRef &IR) { in onInstructionExecuted()
H A DRetireControlUnit.cpp41 unsigned RetireControlUnit::reserveSlot(const InstRef &IR, in reserveSlot()
/freebsd-12.1/contrib/llvm/lib/MCA/Stages/
H A DExecuteStage.cpp44 bool ExecuteStage::isAvailable(const InstRef &IR) const { in isAvailable()
54 Error ExecuteStage::issueInstruction(InstRef &IR) { in issueInstruction()
56 SmallVector<InstRef, 4> Ready; in issueInstruction()
69 for (const InstRef &I : Ready) in issueInstruction()
75 InstRef IR = HWS.select(); in issueReadyInstructions()
89 SmallVector<InstRef, 4> Executed; in cycleStart()
90 SmallVector<InstRef, 4> Ready; in cycleStart()
97 for (InstRef &IR : Executed) { in cycleStart()
104 for (const InstRef &IR : Ready) in cycleStart()
135 Error ExecuteStage::execute(InstRef &IR) { in execute()
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H A DDispatchStage.cpp29 void DispatchStage::notifyInstructionDispatched(const InstRef &IR, in notifyInstructionDispatched()
37 bool DispatchStage::checkPRF(const InstRef &IR) const { in checkPRF()
53 bool DispatchStage::checkRCU(const InstRef &IR) const { in checkRCU()
62 bool DispatchStage::canDispatch(const InstRef &IR) const { in canDispatch()
87 Error DispatchStage::dispatch(InstRef IR) { in dispatch()
162 CarriedOver = InstRef(); in cycleStart()
166 bool DispatchStage::isAvailable(const InstRef &IR) const { in isAvailable()
181 Error DispatchStage::execute(InstRef &IR) { in execute()
H A DEntryStage.cpp24 bool EntryStage::isAvailable(const InstRef & /* unused */) const { in isAvailable()
36 CurrentInstruction = InstRef(SR.first, Inst.get()); in getNextInstruction()
41 llvm::Error EntryStage::execute(InstRef & /*unused */) { in execute() argument
H A DRetireStage.cpp46 llvm::Error RetireStage::execute(InstRef &IR) { in execute()
51 void RetireStage::notifyInstructionRetired(const InstRef &IR) const { in notifyInstructionRetired()
H A DInstructionTables.cpp23 Error InstructionTables::execute(InstRef &IR) { in execute()
/freebsd-12.1/contrib/llvm/include/llvm/MCA/Stages/
H A DExecuteStage.h32 Error issueInstruction(InstRef &IR);
39 Error handleInstructionEliminated(InstRef &IR);
54 bool isAvailable(const InstRef &IR) const override;
64 Error execute(InstRef &IR) override;
67 const InstRef &IR,
69 void notifyInstructionExecuted(const InstRef &IR) const;
70 void notifyInstructionReady(const InstRef &IR) const;
74 void notifyReservedOrReleasedBuffers(const InstRef &IR, bool Reserved) const;
H A DDispatchStage.h55 InstRef CarriedOver;
60 bool checkRCU(const InstRef &IR) const;
61 bool checkPRF(const InstRef &IR) const;
62 bool canDispatch(const InstRef &IR) const;
63 Error dispatch(InstRef IR);
67 void notifyInstructionDispatched(const InstRef &IR,
78 bool isAvailable(const InstRef &IR) const override;
84 Error execute(InstRef &IR) override;
H A DStage.h26 class InstRef; variable
43 virtual bool isAvailable(const InstRef &IR) const { return true; } in isAvailable()
56 virtual Error execute(InstRef &IR) = 0;
63 bool checkNextStage(const InstRef &IR) const { in checkNextStage()
71 Error moveToTheNextStage(InstRef &IR) { in moveToTheNextStage()
H A DEntryStage.h28 InstRef CurrentInstruction;
42 bool isAvailable(const InstRef &IR) const override;
44 Error execute(InstRef &IR) override;
H A DRetireStage.h41 Error execute(InstRef &IR) override;
42 void notifyInstructionRetired(const InstRef &IR) const;
H A DInstructionTables.h41 Error execute(InstRef &IR) override;
/freebsd-12.1/contrib/llvm/include/llvm/MCA/
H A DHWEventListener.h52 HWInstructionEvent(unsigned type, const InstRef &Inst) in HWInstructionEvent()
59 const InstRef &IR;
65 HWInstructionIssuedEvent(const InstRef &IR, in HWInstructionIssuedEvent()
74 HWInstructionDispatchedEvent(const InstRef &IR, ArrayRef<unsigned> Regs, in HWInstructionDispatchedEvent()
95 HWInstructionRetiredEvent(const InstRef &IR, ArrayRef<unsigned> Regs) in HWInstructionRetiredEvent()
120 HWStallEvent(unsigned type, const InstRef &Inst) : Type(type), IR(Inst) {} in HWStallEvent()
126 const InstRef &IR;
143 virtual void onReservedBuffers(const InstRef &Inst, in onReservedBuffers()
145 virtual void onReleasedBuffers(const InstRef &Inst, in onReleasedBuffers()
H A DInstruction.h478 class InstRef {
482 InstRef() : Data(std::make_pair(0, nullptr)) {} in InstRef() function
483 InstRef(unsigned Index, Instruction *I) : Data(std::make_pair(Index, I)) {} in InstRef() function
485 bool operator==(const InstRef &Other) const { return Data == Other.Data; }
503 inline raw_ostream &operator<<(raw_ostream &OS, const InstRef &IR) {
/freebsd-12.1/contrib/llvm/tools/llvm-mca/Views/
H A DSchedulerStatistics.h81 void onReservedBuffers(const InstRef &IR,
86 void onReleasedBuffers(const InstRef &IR,
H A DSchedulerStatistics.cpp75 void SchedulerStatistics::onReservedBuffers(const InstRef & /* unused */, in onReservedBuffers() argument
84 void SchedulerStatistics::onReleasedBuffers(const InstRef & /* unused */, in onReleasedBuffers() argument
H A DTimelineView.h175 void onReservedBuffers(const InstRef &IR,
H A DTimelineView.cpp41 void TimelineView::onReservedBuffers(const InstRef &IR, in onReservedBuffers()
/freebsd-12.1/contrib/llvm/lib/Transforms/Vectorize/
H A DVPlanHCFGBuilder.cpp192 for (Instruction &InstRef : *BB) { in createVPInstructionsForVPBB()
193 Instruction *Inst = &InstRef; in createVPInstructionsForVPBB()
/freebsd-12.1/contrib/llvm/lib/MCA/
H A DPipeline.cpp61 InstRef IR; in runCycle()