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Searched refs:Insn (Results 1 – 25 of 52) sorted by relevance

123

/freebsd-12.1/contrib/llvm/lib/Target/XCore/Disassembler/
H A DXCoreDisassembler.cpp53 Insn = (Bytes[0] << 0) | (Bytes[1] << 8); in readInstruction16()
65 Insn = in readInstruction32()
93 unsigned Insn,
103 unsigned Insn,
113 unsigned Insn,
128 unsigned Insn,
138 unsigned Insn,
158 unsigned Insn,
245 if (fieldFromInstruction(Insn, 5, 1)) { in Decode2OpInstruction()
703 unsigned Op4 = fieldFromInstruction(Insn, 16, 4); in DecodeL4RSrcDstInstruction()
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/freebsd-12.1/contrib/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp436 uint32_t Cond = (Insn >> 28) & 0xF; in checkDecodedInstruction()
464 uint32_t Insn = in getInstruction() local
1524 if (!fieldFromInstruction(Insn, 23, 1)) in DecodeAddrMode2IdxInstruction()
2181 fieldFromInstruction(Insn, 4,4) != 0) in DecodeSETPANInstruction()
2184 fieldFromInstruction(Insn, 0,4) != 0) in DecodeSETPANInstruction()
4386 if (fieldFromInstruction(Insn, 4, 1)) in DecodeVLD1LN()
4391 if (fieldFromInstruction(Insn, 5, 1)) in DecodeVLD1LN()
4394 if (fieldFromInstruction(Insn, 4, 1)) in DecodeVLD1LN()
4398 if (fieldFromInstruction(Insn, 6, 1)) in DecodeVLD1LN()
4453 if (fieldFromInstruction(Insn, 4, 1)) in DecodeVST1LN()
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/freebsd-12.1/contrib/llvm/lib/Target/Lanai/Disassembler/
H A DLanaiDisassembler.cpp83 Insn = in readInstruction32()
100 AluOp = (Insn >> 8) & 0x7; in PostOperandDecodeAdjust()
108 unsigned PQ = (Insn >> PqShift) & 0x3; in PostOperandDecodeAdjust()
133 uint32_t Insn; in getInstruction() local
145 PostOperandDecodeAdjust(Instr, Insn); in getInstruction()
176 unsigned Register = (Insn >> 18) & 0x1f; in decodeRiMemoryValue()
178 unsigned Offset = (Insn & 0xffff); in decodeRiMemoryValue()
188 unsigned Register = (Insn >> 15) & 0x1f; in decodeRrMemoryValue()
190 Register = (Insn >> 10) & 0x1f; in decodeRrMemoryValue()
202 unsigned Offset = (Insn & 0x3ff); in decodeSplsValue()
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/freebsd-12.1/contrib/llvm/lib/Target/ARC/Disassembler/
H A DARCDisassembler.cpp55 Insn = in readInstruction32()
162 unsigned S9 = Insn & 0x1ff; in DecodeMEMrs9()
223 DstB = decodeBField(Insn); in DecodeStLImmInstruction()
228 SrcC = decodeCField(Insn); in DecodeStLImmInstruction()
230 LImm = (Insn >> 32); in DecodeStLImmInstruction()
241 SrcB = decodeBField(Insn); in DecodeLdLImmInstruction()
246 DstA = decodeAField(Insn); in DecodeLdLImmInstruction()
248 LImm = (Insn >> 32); in DecodeLdLImmInstruction()
259 DstA = decodeAField(Insn); in DecodeLdRLImmInstruction()
261 SrcB = decodeBField(Insn); in DecodeLdRLImmInstruction()
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/freebsd-12.1/contrib/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp1172 Insn = (Bytes[0] << 8) | Bytes[1]; in readInstruction16()
1174 Insn = (Bytes[1] << 8) | Bytes[0]; in readInstruction16()
1201 Insn = in readInstruction32()
1221 uint32_t Insn; in getInstruction() local
1744 unsigned Offset = Insn & 0xf; in DecodeMemMMImm4()
1802 unsigned Offset = Insn & 0x1F; in DecodeMemMMSPImm5Lsl2()
1818 unsigned Offset = Insn & 0x7F; in DecodeMemMMGPImm7Lsl2()
1841 Offset = SignExtend32<4>(Insn & 0xf); in DecodeMemMMReglistImm4Lsl2()
2362 int Size = (int) Insn - Pos + 1; in DecodeInsSize()
2382 switch (Insn) { in DecodeSimm9SP()
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/freebsd-12.1/contrib/llvm/lib/Analysis/
H A DInstructionPrecedenceTracking.cpp58 const Instruction *Insn) { in isPreceededBySpecialInstruction() argument
83 for (const Instruction &Insn : *BB) in validate()
84 if (isSpecialInstruction(&Insn)) { in validate()
85 assert(It->second == &Insn && in validate()
126 const Instruction *Insn) const { in isSpecialInstruction()
141 if (isa<LoadInst>(Insn)) { in isSpecialInstruction()
142 assert(cast<LoadInst>(Insn)->isVolatile() && in isSpecialInstruction()
146 if (isa<StoreInst>(Insn)) { in isSpecialInstruction()
147 assert(cast<StoreInst>(Insn)->isVolatile() && in isSpecialInstruction()
155 const Instruction *Insn) const { in isSpecialInstruction()
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/freebsd-12.1/contrib/llvm/lib/Target/MSP430/Disassembler/
H A DMSP430Disassembler.cpp185 static AddrMode DecodeSrcAddrModeI(unsigned Insn) { in DecodeSrcAddrModeI() argument
186 unsigned Rs = fieldFromInstruction(Insn, 8, 4); in DecodeSrcAddrModeI()
187 unsigned As = fieldFromInstruction(Insn, 4, 2); in DecodeSrcAddrModeI()
192 unsigned Rs = fieldFromInstruction(Insn, 0, 4); in DecodeSrcAddrModeII()
193 unsigned As = fieldFromInstruction(Insn, 4, 2); in DecodeSrcAddrModeII()
197 static AddrMode DecodeDstAddrMode(unsigned Insn) { in DecodeDstAddrMode() argument
198 unsigned Rd = fieldFromInstruction(Insn, 0, 4); in DecodeDstAddrMode()
199 unsigned Ad = fieldFromInstruction(Insn, 7, 1); in DecodeDstAddrMode()
239 AddrMode SrcAM = DecodeSrcAddrModeI(Insn); in getInstructionI()
240 AddrMode DstAM = DecodeDstAddrMode(Insn); in getInstructionI()
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/freebsd-12.1/contrib/llvm/utils/TableGen/
H A DPseudoLoweringEmitter.cpp56 CodeGenInstruction &Insn,
93 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec) in addDagOperandMapping()
103 OpsAdded += Insn.Operands[i].MINumOperands; in addDagOperandMapping()
140 CodeGenInstruction Insn(Operator); in evaluateExpansion() local
142 if (Insn.isCodeGenOnly || Insn.isPseudo) in evaluateExpansion()
146 if (Insn.Operands.size() != Dag->getNumArgs()) in evaluateExpansion()
151 for (unsigned i = 0, e = Insn.Operands.size(); i != e; ++i) in evaluateExpansion()
152 NumMIOperands += Insn.Operands[i].MINumOperands; in evaluateExpansion()
156 addDagOperandMapping(Rec, Dag, Insn, OperandMap, 0); in evaluateExpansion()
174 for (unsigned i = 0, e = Insn.Operands.size(); i != e; ++i) { in evaluateExpansion()
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H A DFixedLenDecoderEmitter.cpp410 Insn.push_back(BIT_UNSET); in insnWithID()
412 Insn.push_back(bitFromBits(Bits, i)); in insnWithID()
530 insn_t Insn; in Filter() local
533 Owner->insnWithID(Insn, Owner->Opcodes[i]); in Filter()
967 if (Insn[StartBit + i] == BIT_UNSET) in fieldFromInsn()
970 if (Insn[StartBit + i] == BIT_TRUE) in fieldFromInsn()
1032 Val = Value(Insn[i]); in getIslands()
1321 insn_t Insn; in emitSingletonTableEntry() local
1322 insnWithID(Insn, Opc); in emitSingletonTableEntry()
1455 insn_t Insn; in filterProcessor() local
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/freebsd-12.1/contrib/llvm/tools/lld/ELF/Arch/
H A DHexagon.cpp139 if ((0xC000 & Insn) == 0x0) in findMaskR6()
143 if ((0xff000000 & Insn) == I.CmpMask) in findMaskR6()
147 utohexstr(Insn)); in findMaskR6()
152 if ((0xff000000 & Insn) == 0xde000000) in findMaskR8()
154 if ((0xff000000 & Insn) == 0x3c000000) in findMaskR8()
160 if ((0xff000000 & Insn) == 0xa1000000) in findMaskR11()
166 if ((0xff000000 & Insn) == 0x48000000) in findMaskR16()
168 if ((0xff000000 & Insn) == 0x49000000) in findMaskR16()
170 if ((0xff000000 & Insn) == 0x78000000) in findMaskR16()
172 if ((0xff000000 & Insn) == 0xb0000000) in findMaskR16()
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H A DRISCV.cpp103 uint16_t Insn = read16le(Loc) & 0xE383; in relocateOne() local
109 Insn |= Imm8 | Imm4_3 | Imm7_6 | Imm2_1 | Imm5; in relocateOne()
111 write16le(Loc, Insn); in relocateOne()
118 uint16_t Insn = read16le(Loc) & 0xE003; in relocateOne() local
129 write16le(Loc, Insn); in relocateOne()
150 uint32_t Insn = read32le(Loc) & 0xFFF; in relocateOne() local
155 Insn |= Imm20 | Imm10_1 | Imm11 | Imm19_12; in relocateOne()
157 write32le(Loc, Insn); in relocateOne()
165 uint32_t Insn = read32le(Loc) & 0x1FFF07F; in relocateOne() local
170 Insn |= Imm12 | Imm10_5 | Imm4_1 | Imm11; in relocateOne()
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H A DX86.cpp444 const uint8_t Insn[] = { in writePltHeader() local
461 memcpy(Buf, Insn, sizeof(Insn)); in writePltHeader()
472 const uint8_t Insn[] = { in writePlt() local
481 memcpy(Buf, Insn, sizeof(Insn)); in writePlt()
502 const uint8_t Insn[] = { in writePltHeader() local
520 memcpy(Buf, Insn, sizeof(Insn)); in writePltHeader()
530 const uint8_t Insn[] = { in writePlt() local
540 memcpy(Buf, Insn, sizeof(Insn)); in writePlt()
H A DX86_64.cpp584 const uint8_t Insn[] = { in writePltHeader() local
597 memcpy(Buf, Insn, sizeof(Insn)); in writePltHeader()
609 const uint8_t Insn[] = { in writePlt() local
617 memcpy(Buf, Insn, sizeof(Insn)); in writePlt()
635 const uint8_t Insn[] = { in writePltHeader() local
647 memcpy(Buf, Insn, sizeof(Insn)); in writePltHeader()
654 const uint8_t Insn[] = { in writePlt() local
659 memcpy(Buf, Insn, sizeof(Insn)); in writePlt()
/freebsd-12.1/contrib/llvm/include/llvm/Analysis/
H A DInstructionPrecedenceTracking.h66 bool isPreceededBySpecialInstruction(const Instruction *Insn);
73 virtual bool isSpecialInstruction(const Instruction *Insn) const = 0;
116 bool isDominatedByICFIFromSameBlock(const Instruction *Insn) { in isDominatedByICFIFromSameBlock() argument
117 return isPreceededBySpecialInstruction(Insn); in isDominatedByICFIFromSameBlock()
120 virtual bool isSpecialInstruction(const Instruction *Insn) const;
141 bool isDominatedByMemoryWriteFromSameBlock(const Instruction *Insn) { in isDominatedByMemoryWriteFromSameBlock() argument
142 return isPreceededBySpecialInstruction(Insn); in isDominatedByMemoryWriteFromSameBlock()
145 virtual bool isSpecialInstruction(const Instruction *Insn) const;
/freebsd-12.1/contrib/llvm/lib/Target/AVR/Disassembler/
H A DAVRDisassembler.cpp79 uint64_t &Size, uint32_t &Insn) { in readInstruction16() argument
86 Insn = (Bytes[0] << 0) | (Bytes[1] << 8); in readInstruction16()
92 uint64_t &Size, uint32_t &Insn) { in readInstruction32() argument
100 Insn = (Bytes[0] << 0) | (Bytes[1] << 8) | (Bytes[2] << 16) | (Bytes[3] << 24); in readInstruction32()
119 uint32_t Insn; in getInstruction() local
125 Result = readInstruction16(Bytes, Address, Size, Insn); in getInstruction()
131 Insn, Address, this, STI); in getInstruction()
139 Result = readInstruction32(Bytes, Address, Size, Insn); in getInstruction()
143 Result = decodeInstruction(getDecoderTable(Size), Instr, Insn, in getInstruction()
/freebsd-12.1/contrib/llvm/lib/Target/BPF/Disassembler/
H A DBPFDisassembler.cpp127 static DecodeStatus decodeMemoryOpValue(MCInst &Inst, unsigned Insn, in decodeMemoryOpValue() argument
129 unsigned Register = (Insn >> 16) & 0xf; in decodeMemoryOpValue()
131 unsigned Offset = (Insn & 0xffff); in decodeMemoryOpValue()
139 uint64_t &Size, uint64_t &Insn, in readInstruction64() argument
157 Insn = Make_64(Hi, Lo); in readInstruction64()
168 uint64_t Insn, Hi; in getInstruction() local
171 Result = readInstruction64(Bytes, Address, Size, Insn, IsLittleEndian); in getInstruction()
174 uint8_t InstClass = getInstClass(Insn); in getInstruction()
176 getInstSize(Insn) != BPF_DW && in getInstruction()
177 getInstMode(Insn) == BPF_MEM && in getInstruction()
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/freebsd-12.1/contrib/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/
H A DRuntimeDyldELFMips.cpp216 uint32_t Insn = readBytesUnaligned(TargetPtr, 4); in applyMIPSRelocation() local
234 Insn = (Insn & 0xffff0000) | (Value & 0x0000ffff); in applyMIPSRelocation()
235 writeBytesUnaligned(Insn, TargetPtr, 4); in applyMIPSRelocation()
238 Insn = (Insn & 0xfffc0000) | (Value & 0x0003ffff); in applyMIPSRelocation()
239 writeBytesUnaligned(Insn, TargetPtr, 4); in applyMIPSRelocation()
242 Insn = (Insn & 0xfff80000) | (Value & 0x0007ffff); in applyMIPSRelocation()
243 writeBytesUnaligned(Insn, TargetPtr, 4); in applyMIPSRelocation()
246 Insn = (Insn & 0xffe00000) | (Value & 0x001fffff); in applyMIPSRelocation()
247 writeBytesUnaligned(Insn, TargetPtr, 4); in applyMIPSRelocation()
251 Insn = (Insn & 0xfc000000) | (Value & 0x03ffffff); in applyMIPSRelocation()
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H A DRuntimeDyldMachOARM.h273 uint32_t Insn = readBytesUnaligned(LocalAddress, 4); in resolveRelocation() local
276 Insn = (Insn & 0x8f00fbf0) | ((Value & 0xf000) >> 12) | in resolveRelocation()
280 Insn = (Insn & 0xfff0f000) | ((Value & 0xf000) << 4) | (Value & 0x0fff); in resolveRelocation()
281 writeBytesUnaligned(Insn, LocalAddress, 4); in resolveRelocation()
/freebsd-12.1/contrib/llvm/lib/Target/RISCV/Disassembler/
H A DRISCVDisassembler.cpp285 uint32_t Insn; in getInstruction() local
294 Insn = support::endian::read32le(Bytes.data()); in getInstruction()
296 Result = decodeInstruction(DecoderTable32, MI, Insn, Address, this, STI); in getInstruction()
303 Insn = support::endian::read16le(Bytes.data()); in getInstruction()
309 Result = decodeInstruction(DecoderTableRISCV32Only_16, MI, Insn, Address, in getInstruction()
319 Result = decodeInstruction(DecoderTable16, MI, Insn, Address, this, STI); in getInstruction()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCTargetDesc.cpp168 uint32_t Insn = support::endian::read32le(PltContents.data() + Byte); in findPltEntries() local
170 if ((Insn & 0x9f000000) != 0x90000000) in findPltEntries()
173 (((Insn >> 29) & 3) << 12) + (((Insn >> 5) & 0x3ffff) << 14); in findPltEntries()
/freebsd-12.1/contrib/llvm/lib/Transforms/Scalar/
H A DGVNHoist.cpp398 Instruction *Insn = MU->getMemoryInst(); in hasMemoryUse() local
401 if (BB == OldBB && firstInBB(OldPt, Insn)) in hasMemoryUse()
407 if (firstInBB(Insn, NewPt)) in hasMemoryUse()
601 Instruction *Insn = CHI.I; in checkSafety() local
602 if (!Insn) // No instruction was inserted in this CHI. in checkSafety()
605 if (safeToHoistScalar(BB, Insn->getParent(), NumBBsOnAllPaths)) in checkSafety()
608 MemoryUseOrDef *UD = MSSA->getMemoryAccess(Insn); in checkSafety()
609 if (safeToHoistLdSt(BB->getTerminator(), Insn, UD, K, NumBBsOnAllPaths)) in checkSafety()
/freebsd-12.1/contrib/llvm/lib/Target/Sparc/Disassembler/
H A DSparcDisassembler.cpp321 uint64_t &Size, uint32_t &Insn, in readInstruction32() argument
329 Insn = IsLittleEndian in readInstruction32()
343 uint32_t Insn; in getInstruction() local
346 readInstruction32(Bytes, Address, Size, Insn, isLittleEndian); in getInstruction()
354 Result = decodeInstruction(DecoderTableSparcV932, Instr, Insn, Address, this, STI); in getInstruction()
358 Result = decodeInstruction(DecoderTableSparcV832, Instr, Insn, Address, this, STI); in getInstruction()
364 decodeInstruction(DecoderTableSparc32, Instr, Insn, Address, this, STI); in getInstruction()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonInstrFormatsV5.td76 let TSFlags{17} = isExtendable; // Insn may be extended.
78 let TSFlags{18} = isExtended; // Insn must be extended.
H A DHexagonInstrFormats.td112 let TSFlags{23} = isExtendable; // Insn may be extended.
114 let TSFlags{24} = isExtended; // Insn must be extended.
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp174 static DecodeStatus DecodeFMOVLaneInstruction(MCInst &Inst, unsigned Insn,
270 uint32_t Insn = in getInstruction() local
274 return decodeInstruction(DecoderTable32, MI, Insn, Address, this, STI); in getInstruction()
838 static DecodeStatus DecodeFMOVLaneInstruction(MCInst &Inst, unsigned Insn, in DecodeFMOVLaneInstruction() argument
843 unsigned Rd = fieldFromInstruction(Insn, 0, 5); in DecodeFMOVLaneInstruction()
844 unsigned Rn = fieldFromInstruction(Insn, 5, 5); in DecodeFMOVLaneInstruction()
845 unsigned IsToVec = fieldFromInstruction(Insn, 16, 1); in DecodeFMOVLaneInstruction()

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