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Searched refs:InputArg (Results 1 – 25 of 55) sorted by relevance

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/freebsd-12.1/contrib/llvm/tools/clang/lib/Driver/
H A DInputInfo.h33 InputArg, enumerator
39 const llvm::opt::Arg *InputArg; member
66 : Kind(InputArg), Act(nullptr), Type(_Type), BaseInput(_BaseInput) { in InputInfo()
67 Data.InputArg = _InputArg; in InputInfo()
71 : Kind(InputArg), Act(A), Type(GetActionType(A)), BaseInput(_BaseInput) { in InputInfo()
72 Data.InputArg = _InputArg; in InputInfo()
77 bool isInputArg() const { return Kind == InputArg; } in isInputArg()
90 return *Data.InputArg; in getInputArg()
H A DDriver.cpp2122 Inputs.push_back(std::make_pair(types::TY_C, InputArg)); in BuildInputs()
2933 auto &OffloadKind = InputArgToOffloadKindMap[InputArg]; in addDeviceDependencesToHostAction()
2978 const Arg *InputArg) { in addHostDependenceToDeviceActions() argument
3002 auto &OffloadKind = InputArgToOffloadKindMap[InputArg]; in addHostDependenceToDeviceActions()
3032 const Arg *InputArg) { in appendTopLevelActions() argument
3197 const Arg *InputArg = I.second; in BuildActions() local
3206 if (InputArg->isClaimed()) in BuildActions()
3210 InputArg->claim(); in BuildActions()
3227 << InputArg->getAsString(Args) << !!FinalPhaseArg in BuildActions()
3245 C.MakeAction<InputAction>(*InputArg, HeaderType); in BuildActions()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsCCState.h33 void PreAnalyzeCallResultForF128(const SmallVectorImpl<ISD::InputArg> &Ins,
50 PreAnalyzeFormalArgumentsForF128(const SmallVectorImpl<ISD::InputArg> &Ins);
53 PreAnalyzeCallResultForVectorFloat(const SmallVectorImpl<ISD::InputArg> &Ins,
57 const SmallVectorImpl<ISD::InputArg> &Ins);
111 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
120 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult()
H A DMipsCCState.cpp88 const SmallVectorImpl<ISD::InputArg> &Ins, in PreAnalyzeCallResultForF128()
113 const SmallVectorImpl<ISD::InputArg> &Ins, const Type *RetTy) { in PreAnalyzeCallResultForVectorFloat()
149 const SmallVectorImpl<ISD::InputArg> &Ins) { in PreAnalyzeFormalArgumentsForF128()
/freebsd-12.1/contrib/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.h119 const SmallVectorImpl<ISD::InputArg> &Ins,
125 const SmallVectorImpl<ISD::InputArg> &Ins,
131 const SmallVectorImpl<ISD::InputArg> &Ins,
140 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-12.1/contrib/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h140 const SmallVectorImpl<ISD::InputArg> &Ins,
146 const SmallVectorImpl<ISD::InputArg> &Ins,
152 const SmallVectorImpl<ISD::InputArg> &Ins,
158 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h963 const SmallVectorImpl<ISD::InputArg> &Ins,
973 const SmallVectorImpl<ISD::InputArg> &Ins,
1028 const SmallVectorImpl<ISD::InputArg> &Ins,
1037 const SmallVectorImpl<ISD::InputArg> &Ins,
1043 const SmallVectorImpl<ISD::InputArg> &Ins,
1066 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
1070 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
1074 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
1087 const SmallVectorImpl<ISD::InputArg> &Ins,
1096 const SmallVectorImpl<ISD::InputArg> &Ins,
[all …]
H A DPPCCCState.cpp28 const SmallVectorImpl<ISD::InputArg> &Ins) { in PreAnalyzeFormalArguments()
H A DPPCCCState.h25 PreAnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins);
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DTargetCallingConv.h137 struct InputArg { struct
153 InputArg() = default; argument
154 InputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool used, in InputArg() function
H A DCallingConvLower.h290 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
294 void AnalyzeArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeArguments()
329 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
535 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.h47 const ISD::InputArg *Arg = nullptr) const;
51 const ISD::InputArg &Arg) const;
109 bool Signed, const ISD::InputArg *Arg = nullptr) const;
255 const SmallVectorImpl<ISD::InputArg> &Ins,
279 const SmallVectorImpl<ISD::InputArg> &Ins,
290 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const;
H A DR600ISelLowering.h44 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-12.1/contrib/llvm/lib/Target/XCore/
H A DXCoreISelLowering.h150 const SmallVectorImpl<ISD::InputArg> &Ins,
158 const SmallVectorImpl<ISD::InputArg> &Ins,
211 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-12.1/contrib/llvm/lib/Target/ARC/
H A DARCISelLowering.h84 const SmallVectorImpl<ISD::InputArg> &Ins,
98 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-12.1/contrib/llvm/lib/Target/BPF/
H A DBPFISelLowering.h78 const SmallVectorImpl<ISD::InputArg> &Ins,
92 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-12.1/contrib/llvm/lib/Target/Sparc/
H A DSparcISelLowering.h129 const SmallVectorImpl<ISD::InputArg> &Ins,
134 const SmallVectorImpl<ISD::InputArg> &Ins,
139 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DCallingConvLower.cpp87 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
174 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult()
273 const SmallVectorImpl<ISD::InputArg> &Ins, in resultsCompatible()
/freebsd-12.1/contrib/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h88 const SmallVectorImpl<ISD::InputArg> &Ins,
96 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-12.1/contrib/llvm/lib/Target/AVR/
H A DAVRISelLowering.h158 const SmallVectorImpl<ISD::InputArg> &Ins,
165 const SmallVectorImpl<ISD::InputArg> &Ins,
H A DAVRISelLowering.cpp889 static void parseFunctionArgs(const SmallVectorImpl<ISD::InputArg> &Ins, in parseFunctionArgs()
891 for (const ISD::InputArg &Arg : Ins) { in parseFunctionArgs()
936 const SmallVectorImpl<ISD::InputArg> *Ins, in analyzeStandardArguments()
1012 const SmallVectorImpl<ISD::InputArg> *Ins, in analyzeBuiltinArguments()
1030 const SmallVectorImpl<ISD::InputArg> *Ins, in analyzeArguments()
1052 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, SelectionDAG &DAG, in LowerFormalArguments()
1152 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; in LowerCall()
1315 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, SelectionDAG &DAG, in LowerCallResult()
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h45 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h118 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG& DAG) const;
181 const SmallVectorImpl<ISD::InputArg> &Ins,
202 const SmallVectorImpl<ISD::InputArg> &Ins,
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h545 const SmallVectorImpl<ISD::InputArg> &Ins,
554 const SmallVectorImpl<ISD::InputArg> &Ins,
567 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const;
/freebsd-12.1/contrib/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.h86 const SmallVectorImpl<ISD::InputArg> &Ins,

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