Searched refs:In1 (Results 1 – 3 of 3) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCompares.cpp | 40 static bool addWithOverflow(APInt &Result, const APInt &In1, in addWithOverflow() argument
44 Result = In1.sadd_ov(In2, Overflow); in addWithOverflow()
46 Result = In1.uadd_ov(In2, Overflow); in addWithOverflow()
53 static bool subWithOverflow(APInt &Result, const APInt &In1, in subWithOverflow() argument
57 Result = In1.ssub_ov(In2, Overflow); in subWithOverflow()
59 Result = In1.usub_ov(In2, Overflow); in subWithOverflow()
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4518 SDValue In1 = Op.getOperand(0); in LowerFCOPYSIGN() local
4534 DAG.getUNDEF(VecVT), In1); in LowerFCOPYSIGN()
4538 VecVal1 = DAG.getNode(ISD::BITCAST, DL, VecVT, In1); in LowerFCOPYSIGN()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 40920 SDValue In0, In1; in matchPMADDWD_2() local
40958 In1 = N01In; in matchPMADDWD_2()
40966 if (In0 != N00In || In1 != N01In || In0 != N10In || In1 != N11In) in matchPMADDWD_2()
40982 return SplitOpsAndApply(DAG, Subtarget, DL, VT, { In0, In1 }, in matchPMADDWD_2()
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