Searched refs:INTEN (Results 1 – 12 of 12) sorted by relevance
| /freebsd-12.1/sys/dev/aic/ |
| H A D | aic.c | 1209 aic_outb(aic, DMACNTRL0, INTEN); in aic_intr_locked() 1222 aic_outb(aic, DMACNTRL0, INTEN); in aic_intr_locked() 1228 aic_outb(aic, DMACNTRL0, INTEN); in aic_intr_locked() 1267 aic_outb(aic, DMACNTRL0, INTEN); in aic_intr_locked() 1274 aic_outb(aic, DMACNTRL0, INTEN); in aic_intr_locked() 1309 aic_outb(aic, DMACNTRL0, INTEN); in aic_intr_locked() 1315 aic_outb(aic, DMACNTRL0, INTEN); in aic_intr_locked() 1408 aic_outb(aic, DMACNTRL0, INTEN); in aic_reset() 1503 aic_outb(aic, DMACNTRL0, INTEN); in aic_init()
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| H A D | aic6360reg.h | 279 #define INTEN 0x04 macro
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| /freebsd-12.1/sys/dev/xdma/controller/ |
| H A D | pl330.h | 39 #define INTEN 0x020 /* Interrupt Enable */ macro
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| H A D | pl330.c | 564 WRITE4(sc, INTEN, (1 << chan->index)); in pl330_channel_submit_sg()
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| /freebsd-12.1/sys/dev/aic7xxx/ |
| H A D | aic7xxx_inline.h | 576 if ((ahc->pause & INTEN) == 0) { in ahc_intr()
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| H A D | aic7xxx.c | 5167 hcntrl &= ~INTEN; in ahc_intr_enable() 5168 ahc->pause &= ~INTEN; in ahc_intr_enable() 5169 ahc->unpause &= ~INTEN; in ahc_intr_enable() 5171 hcntrl |= INTEN; in ahc_intr_enable() 5172 ahc->pause |= INTEN; in ahc_intr_enable() 5173 ahc->unpause |= INTEN; in ahc_intr_enable()
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| H A D | aic79xx_inline.h | 903 if ((ahd->pause & INTEN) == 0) { in ahd_intr()
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| H A D | aic7xxx_reg.h | 1508 #define INTEN 0x02 macro
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| H A D | aic79xx.c | 7093 hcntrl &= ~INTEN; in ahd_intr_enable() 7094 ahd->pause &= ~INTEN; in ahd_intr_enable() 7095 ahd->unpause &= ~INTEN; in ahd_intr_enable() 7097 hcntrl |= INTEN; in ahd_intr_enable() 7098 ahd->pause |= INTEN; in ahd_intr_enable() 7099 ahd->unpause |= INTEN; in ahd_intr_enable()
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| H A D | aic7xxx.reg | 765 field INTEN 0x02
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| H A D | aic79xx_reg.h | 2462 #define INTEN 0x02 macro
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| H A D | aic79xx.reg | 253 field INTEN 0x02
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