| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 87 case ISD::INLINEASM: break; in numberRCValPredInSU()
123 case ISD::INLINEASM: break; in numberRCValSuccInSU()
448 case ISD::INLINEASM: in SUSchedulingCost()
550 case ISD::INLINEASM: in initNumRegDefsLeft()
|
| H A D | InstrEmitter.cpp | 1052 case ISD::INLINEASM: { in EmitSpecialNode()
1059 TII->get(TargetOpcode::INLINEASM)); in EmitSpecialNode()
|
| H A D | ScheduleDAGFast.cpp | 483 if (Node->getOpcode() == ISD::INLINEASM) { in DelayForLiveRegsBottomUp()
|
| H A D | SelectionDAGDumper.cpp | 172 case ISD::INLINEASM: return "inlineasm"; in getOperationName()
|
| H A D | ScheduleDAGRRList.cpp | 711 case ISD::INLINEASM: in EmitNode()
1351 if (Node->getOpcode() == ISD::INLINEASM) { in DelayForLiveRegsBottomUp()
|
| /freebsd-12.1/contrib/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyExplicitLocals.cpp | 320 assert(MI.getOpcode() == TargetOpcode::INLINEASM); in runOnMachineFunction()
338 if (MI.getOpcode() == TargetOpcode::INLINEASM) { in runOnMachineFunction()
|
| H A D | WebAssemblyAsmPrinter.cpp | 299 assert(MI->getOpcode() == WebAssembly::INLINEASM); in PrintAsmOperand()
|
| H A D | WebAssemblyRegStackify.cpp | 783 if (Insert->getOpcode() == TargetOpcode::INLINEASM) in runOnMachineFunction()
815 if (Def->getOpcode() == TargetOpcode::INLINEASM) in runOnMachineFunction()
|
| /freebsd-12.1/contrib/llvm/lib/Target/Sparc/ |
| H A D | SparcISelDAGToDAG.cpp | 316 SDValue New = CurDAG->getNode(ISD::INLINEASM, SDLoc(N), in tryInlineAsm()
332 case ISD::INLINEASM: { in Select()
|
| /freebsd-12.1/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsSERegisterInfo.cpp | 104 case Mips::INLINEASM: { in getLoadStoreOffsetSizeInBits()
|
| H A D | MipsInstrInfo.cpp | 581 case TargetOpcode::INLINEASM: { // Inline Asm: Variable size. in getInstSizeInBytes()
|
| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVectorPrint.cpp | 103 BuildMI(*MBB, I, DL, QII->get(TargetOpcode::INLINEASM)) in addAsmInstr()
|
| H A D | HexagonMachineScheduler.cpp | 115 case TargetOpcode::INLINEASM: in isResourceAvailable()
170 case TargetOpcode::INLINEASM: in reserveResources()
|
| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 667 INLINEASM, enumerator
|
| H A D | MachineInstr.h | 1015 bool isInlineAsm() const { return getOpcode() == TargetOpcode::INLINEASM; }
1018 return getOpcode() == TargetOpcode::INLINEASM && getInlineAsmDialect();
|
| /freebsd-12.1/contrib/llvm/lib/Target/MSP430/ |
| H A D | MSP430InstrInfo.cpp | 311 case TargetOpcode::INLINEASM: { in getInstSizeInBytes()
|
| /freebsd-12.1/contrib/llvm/lib/Target/ARC/ |
| H A D | ARCInstrInfo.cpp | 392 if (MI.getOpcode() == TargetOpcode::INLINEASM) { in getInstSizeInBytes()
|
| /freebsd-12.1/contrib/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 443 case TargetOpcode::INLINEASM: { in getInstSizeInBytes()
|
| /freebsd-12.1/contrib/llvm/lib/Target/AVR/ |
| H A D | AVRInstrInfo.cpp | 491 case TargetOpcode::INLINEASM: { in getInstSizeInBytes()
|
| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | GCNHazardRecognizer.cpp | 278 if (Opcode == AMDGPU::INLINEASM) in getWaitStatesSince()
|
| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | Thumb2InstrInfo.cpp | 481 if (Opcode == ARM::INLINEASM) in rewriteT2FrameIndex()
|
| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXSwapRemoval.cpp | 429 case PPC::INLINEASM: in gatherVectorInstructions()
|
| H A D | PPCRegisterInfo.cpp | 1004 else if (OpC != TargetOpcode::INLINEASM) { in eliminateFrameIndex()
|
| /freebsd-12.1/contrib/llvm/tools/llvm-bcanalyzer/ |
| H A D | llvm-bcanalyzer.cpp | 248 STRINGIFY_CODE(CST_CODE, INLINEASM) in GetCodeName()
|
| /freebsd-12.1/contrib/llvm/include/llvm/Support/ |
| H A D | TargetOpcodes.def | 31 HANDLE_TARGET_OPCODE(INLINEASM)
|