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Searched refs:GPR32 (Results 1 – 25 of 28) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64InstrAtomics.td133 GPR32:$val),
134 (STRBBroW GPR32:$val, GPR64sp:$Rn, GPR32:$Rm, ro_Wextend8:$extend)>;
137 GPR32:$val),
152 (STRHHroW GPR32:$val, GPR64sp:$Rn, GPR32:$Rm, ro_Wextend16:$extend)>;
170 (STRWroW GPR32:$val, GPR64sp:$Rn, GPR32:$Rm, ro_Wextend32:$extend)>;
383 def CMP_SWAP_8 : Pseudo<(outs GPR32:$Rd, GPR32:$scratch),
384 (ins GPR64:$addr, GPR32:$desired, GPR32:$new), []>,
387 def CMP_SWAP_16 : Pseudo<(outs GPR32:$Rd, GPR32:$scratch),
388 (ins GPR64:$addr, GPR32:$desired, GPR32:$new), []>,
391 def CMP_SWAP_32 : Pseudo<(outs GPR32:$Rd, GPR32:$scratch),
[all …]
H A DAArch64InstrInfo.td981 def : Pat<(sub GPR32:$Rn, GPR32:$Rm),
982 (SUBSWrr GPR32:$Rn, GPR32:$Rm)>;
1043 def : Pat<(int_aarch64_udiv GPR32:$Rn, GPR32:$Rm), (UDIVWr GPR32:$Rn, GPR32:$Rm)>;
1045 def : Pat<(int_aarch64_sdiv GPR32:$Rn, GPR32:$Rm), (SDIVWr GPR32:$Rn, GPR32:$Rm)>;
1068 def : Pat<(i32 (mul GPR32:$Rn, GPR32:$Rm)),
1069 (MADDWrrr GPR32:$Rn, GPR32:$Rm, WZR)>;
1074 (MSUBWrrr GPR32:$Rn, GPR32:$Rm, WZR)>;
1379 (EXTRWrri GPR32:$dst, GPR32:$src, GPR32:$src, imm0_31:$shift)>;
1559 (CSINCWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc)>;
1564 (CSINVWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc)>;
[all …]
H A DAArch64InstrFormats.td1813 def : Pat<(i32 (OpNode GPR32:$Rn, (i64 (zext GPR32:$Rm)))),
1816 def : Pat<(i32 (OpNode GPR32:$Rn, (i64 (anyext GPR32:$Rm)))),
1819 def : Pat<(i32 (OpNode GPR32:$Rn, (i64 (sext GPR32:$Rm)))),
1847 def Wrrr : BaseMulAccum<isSub, 0b000, GPR32, GPR32, asm,
1848 [/*(set GPR32:$Rd, (AccNode GPR32:$Ra, (mul GPR32:$Rn, GPR32:$Rm)))*/]>,
1891 (inst GPR32:$dst, GPR32:$src1, GPR32:$src2, WZR)>;
1901 : I<(outs GPR32:$Rd), (ins GPR32:$Rn, StreamReg:$Rm),
1903 [(set GPR32:$Rd, (OpNode GPR32:$Rn, StreamReg:$Rm))]>,
2199 GPR32, GPR32, GPR32, 0>;
2296 WZR, GPR32:$src1, GPR32:$src2, 0), 5>;
[all …]
H A DAArch64RegisterInfo.td137 // GPR register classes with the intersections of GPR32/GPR32sp and
149 def GPR32 : RegisterClass<"AArch64", [i32], 32, (add GPR32common, WZR)> {
150 let AltOrders = [(rotl GPR32, 8)];
182 // GPR32/GPR64 but with zero-register substitution enabled.
183 // TODO: Roll this out to GPR32/GPR64/GPR32all/GPR64all.
184 def GPR32z : RegisterOperand<GPR32> {
653 [(decimate (rotl GPR32, 0), 2),
654 (decimate (rotl GPR32, 1), 2)]>;
H A DSVEInstrFormats.td823 def _B : sve_int_perm_insrs<0b00, asm, ZPR8, GPR32>;
824 def _H : sve_int_perm_insrs<0b01, asm, ZPR16, GPR32>;
825 def _S : sve_int_perm_insrs<0b10, asm, ZPR32, GPR32>;
2491 def _B : sve_int_index_rr<0b00, asm, ZPR8, GPR32>;
2492 def _H : sve_int_index_rr<0b01, asm, ZPR16, GPR32>;
2493 def _S : sve_int_index_rr<0b10, asm, ZPR32, GPR32>;
3164 def _B : sve_int_perm_clast_rz<0b00, ab, asm, ZPR8, GPR32>;
3165 def _H : sve_int_perm_clast_rz<0b01, ab, asm, ZPR16, GPR32>;
3248 def _B : sve_int_perm_last_r<0b00, ab, asm, ZPR8, GPR32>;
3249 def _H : sve_int_perm_last_r<0b01, ab, asm, ZPR16, GPR32>;
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/ARC/
H A DARCInstrInfo.td125 (ins GPR32:$B, GPR32:$C),
129 (ins GPR32:$B, GPR32:$C),
288 (outs GPR32:$B), (ins GPR32:$C),
304 (ins GPR32:$C, GPR32:$fval, cmovpred:$cc),
455 F16_COMPACT<0b0, (outs GPR32:$g), (ins GPR32:$h),
474 F16_COMPACT<0b1, (outs GPR32:$r), (ins GPR32:$h, immU<5>:$u5),
628 F16_OP_HREG<0b000, (outs GPR32:$b_s3), (ins GPR32:$h),
644 F16_OP_HREG<0b111,(outs GPR32:$b_s3), (ins GPR32:$h),
660 F16_OP_HREG<0b100, (outs GPR32:$b_s3), (ins GPR32:$h),
824 (outs GPR32:$addrout, GPR32:$A),
[all …]
H A DARCInstrFormats.td44 let MIOperandInfo = (ops GPR32:$B, immS<9>:$S9);
50 let MIOperandInfo = (ops GPR32:$B, i32imm:$LImm);
500 F16_LD_ADD_SUB<(outs GPR32:$a), (ins GPR32:$b, GPR32:$c),
513 F16_LD_ADD_SUB<(outs GPR32:$r), (ins GPR32:$b, immU<6>:$u6),
545 F16_LD_ST_1<(outs GPR32:$b), (ins immU<7>:$u7),
571 InstARC<2, (outs GPR32:$a), (ins GPR32:$b, GPR32:$c),
597 InstARC<2, (outs GPR32:$c), (ins GPR32:$b, immU<3>:$u3),
656 F16_GEN_DOP_BASE<i, (outs GPR32:$b), (ins GPR32:$c),
660 F16_GEN_DOP_BASE<i, (outs), (ins GPR32:$b, GPR32:$c),
664 F16_GEN_DOP_BASE<i, (outs GPR32:$b), (ins GPR32:$c),
[all …]
H A DARCRegisterInfo.td71 def GPR32: RegisterClass<"ARC", [i32], 32,
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsCondMov.td198 defm : MovzPats0<GPR32, GPR32, MOVZ_I_I, SLT, SLTu, SLTi, SLTiu>,
200 defm : MovzPats1<GPR32, GPR32, MOVZ_I_I, XOR>, INSN_MIPS4_32_NOT_32R6_64R6;
201 defm : MovzPats2<GPR32, GPR32, MOVZ_I_I, XORi>, INSN_MIPS4_32_NOT_32R6_64R6;
203 defm : MovzPats0<GPR32, GPR64, MOVZ_I_I64, SLT, SLTu, SLTi, SLTiu>,
209 defm : MovzPats1<GPR32, GPR64, MOVZ_I_I64, XOR>,
211 defm : MovzPats1<GPR64, GPR32, MOVZ_I64_I, XOR64>,
215 defm : MovzPats2<GPR32, GPR64, MOVZ_I_I64, XORi>,
217 defm : MovzPats2<GPR64, GPR32, MOVZ_I64_I, XORi64>,
222 defm : MovnPats<GPR32, GPR32, MOVN_I_I, XOR>, INSN_MIPS4_32_NOT_32R6_64R6;
231 defm : MovzPats0<GPR32, FGR32, MOVZ_I_S, SLT, SLTu, SLTi, SLTiu>,
[all …]
H A DMicroMipsInstrInfo.td1231 def : MipsPat<(shl GPR32:$lhs, GPR32:$rhs),
1232 (SLLV_MM GPR32:$lhs, GPR32:$rhs)>, ISA_MICROMIPS;
1238 def : MipsPat<(srl GPR32:$lhs, GPR32:$rhs),
1239 (SRLV_MM GPR32:$lhs, GPR32:$rhs)>, ISA_MICROMIPS;
1243 def : MipsPat<(sra GPR32:$lhs, GPR32:$rhs),
1244 (SRAV_MM GPR32:$lhs, GPR32:$rhs)>, ISA_MICROMIPS;
1255 def : MipsPat<(subc GPR32:$lhs, GPR32:$rhs),
1301 defm : MovzPats1<GPR32, GPR32, MOVZ_I_MM, XOR_MM>,
1303 defm : MovzPats2<GPR32, GPR32, MOVZ_I_MM, XORi_MM>,
1312 defm : MovzPats1<GPR32, GPR32, MOVZ_I_MM, XOR_MM>,
[all …]
H A DMips64r6InstrInfo.td304 def : MipsPat<(i64 (sext (i32 (mul GPR32:$src, GPR32:$src2)))),
306 (MUL_R6 GPR32:$src, GPR32:$src2), sub_32)>, ISA_MIPS64R6;
307 def : MipsPat<(i64 (sext (i32 (sdiv GPR32:$src, GPR32:$src2)))),
309 (DIV GPR32:$src, GPR32:$src2), sub_32)>, ISA_MIPS64R6;
310 def : MipsPat<(i64 (sext (i32 (udiv GPR32:$src, GPR32:$src2)))),
312 (DIVU GPR32:$src, GPR32:$src2), sub_32)>, ISA_MIPS64R6;
313 def : MipsPat<(i64 (sext (i32 (srem GPR32:$src, GPR32:$src2)))),
315 (MOD GPR32:$src, GPR32:$src2), sub_32)>, ISA_MIPS64R6;
316 def : MipsPat<(i64 (sext (i32 (urem GPR32:$src, GPR32:$src2)))),
318 (MODU GPR32:$src, GPR32:$src2), sub_32)>, ISA_MIPS64R6;
H A DMips64InstrInfo.td840 def : MipsPat<(i64 (sext (i32 (add GPR32:$src, GPR32:$src2)))),
842 (ADDu GPR32:$src, GPR32:$src2), sub_32)>;
843 def : MipsPat<(i64 (sext (i32 (sub GPR32:$src, GPR32:$src2)))),
845 (SUBu GPR32:$src, GPR32:$src2), sub_32)>;
846 def : MipsPat<(i64 (sext (i32 (mul GPR32:$src, GPR32:$src2)))),
858 def : MipsPat<(i64 (sext (i32 (shl GPR32:$src, GPR32:$src2)))),
860 (SLLV GPR32:$src, GPR32:$src2), sub_32)>;
864 def : MipsPat<(i64 (sext (i32 (srl GPR32:$src, GPR32:$src2)))),
866 (SRLV GPR32:$src, GPR32:$src2), sub_32)>;
870 def : MipsPat<(i64 (sext (i32 (sra GPR32:$src, GPR32:$src2)))),
[all …]
H A DMipsInstrInfo.td2334 def MIPSeh_return32 : MipsPseudo<(outs), (ins GPR32:$spoff, GPR32:$dst),
2335 [(MIPSehret GPR32:$spoff, GPR32:$dst)]>;
3047 def : MipsPat<(subc GPR32:$lhs, GPR32:$rhs),
3048 (SUBu GPR32:$lhs, GPR32:$rhs)>, ISA_MIPS1;
3050 def : MipsPat<(addc GPR32:$lhs, GPR32:$rhs),
3051 (ADDu GPR32:$lhs, GPR32:$rhs)>, ISA_MIPS1, ASE_NOT_DSP;
3057 def : MipsPat<(mul GPR32:$lhs, GPR32:$rhs),
3058 (PseudoMFLO (PseudoMULT GPR32:$lhs, GPR32:$rhs))>,
3261 def : MipsPat<(atomic_store_8 addr:$a, GPR32:$v), (SB GPR32:$v, addr:$a)>,
3263 def : MipsPat<(atomic_store_16 addr:$a, GPR32:$v), (SH GPR32:$v, addr:$a)>,
[all …]
H A DMicroMips32r6InstrInfo.td1729 def : MipsPat<(subc GPR32:$lhs, GPR32:$rhs),
1730 (SUBU_MMR6 GPR32:$lhs, GPR32:$rhs)>, ISA_MICROMIPS32R6;
1765 def : MipsPat<(not GPR32:$in),
1793 def : MipsPat<(brcond (i32 (setge GPR32:$lhs, GPR32:$rhs)), bb:$dst),
1794 (BEQZC_MMR6 (SLT_MM GPR32:$lhs, GPR32:$rhs), bb:$dst)>,
1796 def : MipsPat<(brcond (i32 (setuge GPR32:$lhs, GPR32:$rhs)), bb:$dst),
1797 (BEQZC_MMR6 (SLTu_MM GPR32:$lhs, GPR32:$rhs), bb:$dst)>,
1812 def : MipsPat<(brcond (i32 (setle GPR32:$lhs, GPR32:$rhs)), bb:$dst),
1813 (BEQZC_MMR6 (SLT_MM GPR32:$rhs, GPR32:$lhs), bb:$dst)>,
1815 def : MipsPat<(brcond (i32 (setule GPR32:$lhs, GPR32:$rhs)), bb:$dst),
[all …]
H A DMipsRegisterBanks.td13 def GPRBRegBank : RegisterBank<"GPRB", [GPR32]>;
H A DMicroMipsInstrFPU.td435 defm : MovzPats0<GPR32, FGR32, MOVZ_I_S_MM, SLT_MM, SLTu_MM, SLTi_MM, SLTiu_MM>,
437 defm : MovzPats1<GPR32, FGR32, MOVZ_I_S_MM, XOR_MM>,
440 defm : MovnPats<GPR32, FGR32, MOVN_I_S_MM, XOR_MM>,
443 defm : MovzPats0<GPR32, AFGR64, MOVZ_I_D32_MM, SLT_MM, SLTu_MM, SLTi_MM,
446 defm : MovzPats1<GPR32, AFGR64, MOVZ_I_D32_MM, XOR_MM>,
448 defm : MovnPats<GPR32, AFGR64, MOVN_I_D32_MM, XOR_MM>,
H A DMipsDSPInstrInfo.td1318 def PseudoMTLOHI_DSP : PseudoMTLOHI<ACC64DSP, GPR32>;
1330 def : BitconvertPat<i32, v2i16, GPR32, DSPR>;
1331 def : BitconvertPat<i32, v4i8, GPR32, DSPR>;
1332 def : BitconvertPat<v2i16, i32, DSPR, GPR32>;
1333 def : BitconvertPat<v4i8, i32, DSPR, GPR32>;
1344 (SW (COPY_TO_REGCLASS DSPR:$val, GPR32), addr:$a)>;
1346 (SW (COPY_TO_REGCLASS DSPR:$val, GPR32), addr:$a)>;
1439 DSPPat<(i32 (OpNode GPR32:$rs, ACC64DSP:$ac)),
1440 (Instr ACC64DSP:$ac, GPR32:$rs)>;
H A DMipsMSAInstrInfo.td3737 MipsPseudo<(outs GPR32:$dst),
3917 GPR32), (i32 24))>;
3922 GPR32), (i32 16))>;
3927 GPR32)>;
3948 GPR32)>;
3973 GPR32),
3983 GPR32),
3993 GPR32)>;
4011 GPR32),
4021 GPR32),
[all …]
H A DMipsRegisterInfo.td292 def GPR32 : GPR32Class<[i32]>;
619 def GPR32Opnd : RegisterOperand<GPR32> {
/freebsd-12.1/contrib/llvm/lib/Target/BPF/
H A DBPFInstrInfo.td225 (ins GPR32:$src2, GPR32:$src),
232 [(set GPR32:$dst, (OpNode GPR32:$src2, i32immSExt32:$imm))]>;
263 def NEG_32: NEG_RR<BPF_ALU, BPF_NEG, (outs GPR32:$dst), (ins GPR32:$src),
497 (ins GPR:$lhs, GPR:$rhs, i64imm:$imm, GPR32:$src, GPR32:$src2),
502 (ins GPR:$lhs, i64imm:$rhs, i64imm:$imm, GPR32:$src, GPR32:$src2),
507 (ins GPR32:$lhs, GPR32:$rhs, i32imm:$imm, GPR32:$src, GPR32:$src2),
512 (ins GPR32:$lhs, i32imm:$rhs, i32imm:$imm, GPR32:$src, GPR32:$src2),
517 (ins GPR32:$lhs, GPR32:$rhs, i32imm:$imm, GPR:$src, GPR:$src2),
640 def : Pat<(i64 (sext GPR32:$src)),
643 def : Pat<(i64 (zext GPR32:$src)),
[all …]
H A DBPFRegisterInfo.td40 def GPR32 : RegisterClass<"BPF", [i32], 32, (add
/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.td56 class GPR32<bits<16> num, string n> : SystemZReg<n> {
61 class GPR64<bits<16> num, string n, GPR32 low, GPR32 high>
78 def R#I#L : GPR32<I, "r"#I>;
79 def R#I#H : GPR32<I, "r"#I>;
80 def R#I#D : GPR64<I, "r"#I, !cast<GPR32>("R"#I#"L"), !cast<GPR32>("R"#I#"H")>,
H A DSystemZFrameLowering.cpp122 unsigned GPR32 = RI->getSubReg(GPR64, SystemZ::subreg_l32); in addSavedGPR() local
123 bool IsLive = MBB.isLiveIn(GPR64) || MBB.isLiveIn(GPR32); in addSavedGPR()
/freebsd-12.1/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/
H A DRegisterContextFreeBSD_powerpc.cpp96 } GPR32; typedef
206 return sizeof(GPR32); in GetGPRSize()
H A DRegisterInfos_powerpc.h195 #define GPR GPR32

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