| /freebsd-12.1/contrib/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsTargetStreamer.cpp | 261 emitLoadWithImmOffset(Mips::LW, Mips::GP, Mips::SP, Offset, Mips::GP, IDLoc, in emitGPRestore() 1139 TmpInst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpLoad() 1151 TmpInst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpLoad() 1152 TmpInst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpLoad() 1164 TmpInst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpLoad() 1165 TmpInst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpLoad() 1228 emitRRX(Mips::ADDiu, Mips::GP, Mips::GP, MCOperand::createExpr(LoExpr), in emitDirectiveCpsetup() 1245 emitRRX(Mips::ADDiu, Mips::GP, Mips::GP, MCOperand::createExpr(LoExpr), in emitDirectiveCpsetup() 1249 emitRRR(Mips::DADDu, Mips::GP, Mips::GP, RegNo, SMLoc(), &STI); in emitDirectiveCpsetup() 1262 Inst.addOperand(MCOperand::createReg(Mips::GP)); in emitDirectiveCpreturn() [all …]
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| H A D | MipsABIInfo.cpp | 87 return ArePtrs64bit() ? Mips::GP_64 : Mips::GP; in GetGlobalPtr()
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| /freebsd-12.1/sys/gnu/dts/arm/ |
| H A D | meson8b-ec100.dts | 93 * Silergy SY6288CCAC-GP 2A Power Distribution Switch. 134 * Silergy SY8089AAC-GP 2A continuous, 3A peak, 1MHz 154 * ABLIC S-1339D18-M5001-GP 167 * Silergy SY8089AAC-GP 2A continuous, 3A peak, 1MHz 182 * Silergy SY8089AAC-GP 2A continuous, 3A peak, 1MHz 200 * Global Mixed-mode Technology Inc. G918T12U-GP
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| H A D | armada-395-gp.dts | 3 * Device Tree file for Marvell Armada 395 GP board 14 model = "Marvell Armada 395 GP Board";
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| H A D | armada-388-gp.dts | 4 * (RD-88F6820-GP) 16 model = "Marvell Armada 388 DB-88F6820-GP"; 177 * A388-GP board v1.5 and higher replace
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| H A D | armada-xp-gp.dts | 4 * (DB-MV784MP-GP) 27 model = "Marvell Armada XP Development Board DB-MV784MP-GP";
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| /freebsd-12.1/contrib/binutils/gas/doc/ |
| H A D | c-ia64.texi | 37 as using the ``constant GP'' model. With this model, it is assumed 38 that the entire program uses a single global pointer (GP) value. Note 45 as using the ``constant GP without function descriptor'' data model. 46 This model is like the ``constant GP'' model, except that it 50 descriptor, which contains both the code entry-point and the GP-value
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| H A D | c-alpha.texi | 243 Used with @code{ldah} and @code{lda} to load the GP from the current 258 32-bit displacement from the GP. 262 32-bit displacement from the GP. 266 from the GP. 269 Used with any branch format instruction to skip the GP load at the 270 target address. The referenced symbol must have the same GP as the 272 or perform a standard GP load in the first two instructions via the 384 to perform a load of the GP register; 2 indicates that @code{$27} is 395 instructions of the function perform a GP load. 402 GP for the current object file, and stores it in 4 bytes. In addition
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| /freebsd-12.1/contrib/llvm/lib/Target/ARC/ |
| H A D | ARCRegisterInfo.td | 59 def GP : Core<26, "%gp",["%r26"]>, DwarfRegNum<[26]>; 74 R20, R21, R22, R23, R24, R25, GP, FP, SP, ILINK, R30, BLINK)>;
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| H A D | ARCCallingConv.td | 41 def CSR_ARC : CalleeSavedRegs<(add (sequence "R%u", 13, 25), GP, FP)>;
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| /freebsd-12.1/share/syscons/fonts/ |
| H A D | iso05-8x14.fnt | 73 M``````!\QL#`QGP``````````'Y:&!@8&```````````QL;&QL9^!GP````` 82 =````*!``QL;&QL9^!GP```````#&QL;^.#@`````
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| H A D | swiss-1251-8x16.fnt | 44 M`'S`<!P&!GP````````0,##\,#`P,#`<````````````QL;&QL;&?``````` 70 M!@8&!@8&QL9\``!\QL#`8#@,!@;&?````````````'S`<!P&!GP``````&9F
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| H A D | iso-thin-8x16.fnt | 38 M0D)"0GP````````````\0D!`0$(\`````````@("/D)"0D)"/@``````````
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| H A D | iso08-8x16.fnt | 65 MLJJJ@GP```````#_````````````````````.&QL.```````````````````
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| H A D | iso15-thin-8x16.fnt | 38 M0D)"0GP````````````\0D!`0$(\`````````@("/D)"0D)"/@``````````
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| H A D | iso05-8x8.fnt | 45 M8&!\9GP```!\!CX&?````,[;^]O.````/F8^-F8`BLWJN)N(BP`D`#QF?F`\
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| H A D | koi8-u-8x8.fnt | 41 M/````-M^/'[;````?&9\9GP```!@8'QF?````,;&]M[V````/&8,9CP```#;
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| H A D | koi8-r-8x8.fnt | 41 M/````-M^/'[;````?&9\9GP```!@8'QF?````,;&]M[V````/&8,9CP```#;
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| /freebsd-12.1/contrib/gcc/config/mips/ |
| H A D | t-sb1 | 1 # GP-rel: G0 only
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| /freebsd-12.1/sys/mips/mips/ |
| H A D | exception.S | 295 SAVE_REG(gp, GP, sp) ;\ 365 RESTORE_REG(gp, GP, sp) ;\ 468 SAVE_U_PCB_REG(gp, GP, k1) 480 PTR_LA gp, _C_LABEL(_gp) # switch to kernel GP 558 RESTORE_U_PCB_REG(gp, GP, k1) 719 SAVE_U_PCB_REG(gp, GP, k1) 746 PTR_LA gp, _C_LABEL(_gp) # switch to kernel GP 838 RESTORE_U_PCB_REG(gp, GP, k1)
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| /freebsd-12.1/lib/libc/mips/gen/ |
| H A D | _setjmp.S | 193 * our caller's GP.
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| /freebsd-12.1/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsRegisterInfo.cpp | 180 Reserved.set(Mips::GP); in getReservedRegs() 247 Reserved.set(Mips::GP); in getReservedRegs()
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| H A D | MipsRegisterInfo.td | 116 def GP : MipsGPRReg< 28, "gp">, DwarfRegNum<[28]>; 150 def GP_64 : Mips64GPRReg< 28, "gp", [GP]>, DwarfRegNum<[28]>; 290 K0, K1, GP, SP, FP, RA)>; 310 K0, K1, GP, SP, FP, RA)>; 485 def GP32 : RegisterClass<"Mips", [i32], 32, (add GP)>, Unallocatable;
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| /freebsd-12.1/sys/mips/include/ |
| H A D | regnum.h | 95 #define GP 28 macro
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| /freebsd-12.1/stand/i386/btx/btx/ |
| H A D | btx.S | 337 push $0xd # Int 0xd: #GP 653 leal -0x18(%esi),%edi # Kernel stack GP regs 655 movl $MEM_ESPR-0x0c,%esi # Real mode stack GP regs 656 movl $8,%ecx # Copy GP regs from
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