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Searched refs:FGR64RegClass (Results 1 – 7 of 7) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsOptionRecord.h51 FGR64RegClass = &(TRI->getRegClass(Mips::FGR64RegClassID)); in MipsRegInfoRecord()
70 const MCRegisterClass *FGR64RegClass; variable
H A DMipsRegisterInfo.cpp191 for (RegIter Reg = Mips::FGR64RegClass.begin(), in getReservedRegs()
192 EReg = Mips::FGR64RegClass.end(); Reg != EReg; ++Reg) in getReservedRegs()
H A DMipsSEInstrInfo.cpp148 else if (Mips::FGR64RegClass.contains(DestReg, SrcReg)) in copyPhysReg()
157 else if (Mips::FGR64RegClass.contains(SrcReg)) in copyPhysReg()
165 else if (Mips::FGR64RegClass.contains(DestReg)) in copyPhysReg()
276 else if (Mips::FGR64RegClass.hasSubClassEq(RC)) in storeRegToStack()
354 else if (Mips::FGR64RegClass.hasSubClassEq(RC)) in loadRegFromStack()
H A DMipsSEFrameLowering.cpp320 FP64 ? &Mips::FGR64RegClass : &Mips::AFGR64RegClass; in expandBuildPairF64()
385 FP64 ? &Mips::FGR64RegClass : &Mips::AFGR64RegClass; in expandExtractElementF64()
481 } else if (Mips::FGR64RegClass.contains(Reg)) { in emitPrologue()
H A DMipsSEISelLowering.cpp177 addRegisterClass(MVT::f64, &Mips::FGR64RegClass); in MipsSETargetLowering()
3751 ? RegInfo.createVirtualRegister(&Mips::FGR64RegClass) in emitFPEXTEND_PSEUDO()
H A DMipsISelLowering.cpp3905 return std::make_pair(0U, &Mips::FGR64RegClass); in getRegForInlineAsmConstraint()
/freebsd-12.1/contrib/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsOptionRecord.cpp92 FGR64RegClass->contains(CurrentSubReg) || in SetPhysRegUsed()