Home
last modified time | relevance | path

Searched refs:ExtVal (Results 1 – 8 of 8) sorted by relevance

/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp1727 ZExtInst *ExtVal = dyn_cast<ZExtInst>(CI->getArgOperand(0)); in optimizeCallInst() local
1728 if (!ExtVal || !ExtVal->hasOneUse() || in optimizeCallInst()
1729 ExtVal->getParent() == CI->getParent()) in optimizeCallInst()
1732 ExtVal->moveBefore(CI); in optimizeCallInst()
1735 InsertedInsts.insert(ExtVal); in optimizeCallInst()
3703 Value *ExtVal = SExt; in promoteOperandForTruncAndAnyExt() local
3713 ExtVal = ZExt; in promoteOperandForTruncAndAnyExt()
3726 Instruction *ExtInst = dyn_cast<Instruction>(ExtVal); in promoteOperandForTruncAndAnyExt()
3733 return ExtVal; in promoteOperandForTruncAndAnyExt()
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMISelLowering.h338 bool isVectorLoadExtDesirable(SDValue ExtVal) const override;
H A DARMISelLowering.cpp13070 bool ARMTargetLowering::isVectorLoadExtDesirable(SDValue ExtVal) const { in isVectorLoadExtDesirable()
13071 EVT VT = ExtVal.getValueType(); in isVectorLoadExtDesirable()
13080 if (ExtVal->use_empty() || in isVectorLoadExtDesirable()
13081 !ExtVal->use_begin()->isOnlyUserOf(ExtVal.getNode())) in isVectorLoadExtDesirable()
13084 SDNode *U = *ExtVal->use_begin(); in isVectorLoadExtDesirable()
/freebsd-12.1/contrib/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp2283 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, Val, in LowerSTOREVector() local
2286 ExtVal = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i16, ExtVal); in LowerSTOREVector()
2287 Ops.push_back(ExtVal); in LowerSTOREVector()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DTargetLowering.h2358 virtual bool isVectorLoadExtDesirable(SDValue ExtVal) const { return false; } in isVectorLoadExtDesirable() argument
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp1701 SDValue ExtVal = SDValue(CurDAG->getMachineNode(PPC::INSERT_SUBREG, dl, in ExtendToInt64() local
1704 return ExtVal; in ExtendToInt64()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp4364 SDValue ExtVal = DAG.getNode(ISD::ZERO_EXTEND, SL, IntVT, Val); in lowerINSERT_VECTOR_ELT() local
4377 SDValue LHS = DAG.getNode(ISD::AND, SL, IntVT, BFM, ExtVal); in lowerINSERT_VECTOR_ELT()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp27569 bool X86TargetLowering::isVectorLoadExtDesirable(SDValue ExtVal) const { in isVectorLoadExtDesirable()
27570 EVT SrcVT = ExtVal.getOperand(0).getValueType(); in isVectorLoadExtDesirable()