| /freebsd-12.1/contrib/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSimplifyDemanded.cpp | 41 const APInt &Demanded) { in ShrinkDemandedConstant() argument
52 if (C->isSubsetOf(Demanded)) in ShrinkDemandedConstant()
56 I->setOperand(OpNo, ConstantInt::get(Op->getType(), *C & Demanded)); in ShrinkDemandedConstant()
1170 APInt Demanded, APInt &Undef) { in SimplifyDemandedVectorElts() argument
1173 if (Value *V = SimplifyDemandedVectorElts(Op, Demanded, Undef, Depth + 1)) { in SimplifyDemandedVectorElts()
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| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 2883 bool ShrinkDemandedConstant(SDValue Op, const APInt &Demanded,
2889 virtual bool targetShrinkDemandedConstant(SDValue Op, const APInt &Demanded, in targetShrinkDemandedConstant() argument
2897 bool ShrinkDemandedOp(SDValue Op, unsigned BitWidth, const APInt &Demanded,
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 2726 APInt Demanded = APInt::getLowBitsSet(LHS.getValueSizeInBits(), 24); in simplifyI24() local
2731 SDValue DemandedLHS = DAG.GetDemandedBits(LHS, Demanded); in simplifyI24()
2732 SDValue DemandedRHS = DAG.GetDemandedBits(RHS, Demanded); in simplifyI24()
2741 if (TLI.SimplifyDemandedBits(LHS, Demanded, DCI)) in simplifyI24()
2743 if (TLI.SimplifyDemandedBits(RHS, Demanded, DCI)) in simplifyI24()
3962 APInt Demanded = APInt::getBitsSet(32, in PerformDAGCombine() local
3970 if (TLI.ShrinkDemandedConstant(BitsFrom, Demanded, TLO) || in PerformDAGCombine()
3971 TLI.SimplifyDemandedBits(BitsFrom, Demanded, Known, TLO)) { in PerformDAGCombine()
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| H A D | SIISelLowering.cpp | 8846 APInt Demanded = APInt::getBitsSet(32, 8 * Offset, 8 * Offset + 8); in performCvtF32UByteNCombine() local
8852 if (TLI.SimplifyDemandedBits(Src, Demanded, Known, TLO)) { in performCvtF32UByteNCombine()
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 259 bool targetShrinkDemandedConstant(SDValue Op, const APInt &Demanded,
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| H A D | AArch64ISelLowering.cpp | 852 const APInt &Demanded, in optimizeLogicalImm() argument
865 uint64_t DemandedBits = Demanded.getZExtValue(); in optimizeLogicalImm()
920 assert(((OldImm ^ NewImm) & Demanded.getZExtValue()) == 0 && in optimizeLogicalImm()
947 SDValue Op, const APInt &Demanded, TargetLoweringOpt &TLO) const { in targetShrinkDemandedConstant() argument
964 if (Demanded.countPopulation() == Size) in targetShrinkDemandedConstant()
985 return optimizeLogicalImm(Op, Size, Imm, Demanded, TLO, NewOpc); in targetShrinkDemandedConstant()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 393 bool targetShrinkDemandedConstant(SDValue Op, const APInt &Demanded,
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| H A D | ARMISelLowering.cpp | 13672 unsigned Demanded = DemandedAPInt.getZExtValue(); in targetShrinkDemandedConstant() local
13673 unsigned ShrunkMask = Mask & Demanded; in targetShrinkDemandedConstant()
13674 unsigned ExpandedMask = Mask | ~Demanded; in targetShrinkDemandedConstant()
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 347 bool TargetLowering::ShrinkDemandedConstant(SDValue Op, const APInt &Demanded, in ShrinkDemandedConstant() argument
354 if (targetShrinkDemandedConstant(Op, Demanded, TLO)) in ShrinkDemandedConstant()
370 if (Opcode == ISD::XOR && Demanded.isSubsetOf(C)) in ShrinkDemandedConstant()
373 if (!C.isSubsetOf(Demanded)) { in ShrinkDemandedConstant()
375 SDValue NewC = DAG.getConstant(Demanded & C, DL, VT); in ShrinkDemandedConstant()
391 const APInt &Demanded, in ShrinkDemandedOp() argument
413 unsigned DemandedSize = Demanded.getActiveBits(); in ShrinkDemandedOp()
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| H A D | DAGCombiner.cpp | 232 APInt Demanded = APInt::getAllOnesValue(BitWidth); in SimplifyDemandedBits() local
233 return SimplifyDemandedBits(Op, Demanded); in SimplifyDemandedBits()
241 APInt Demanded = APInt::getAllOnesValue(NumElts); in SimplifyDemandedVectorElts() local
242 return SimplifyDemandedVectorElts(Op, Demanded); in SimplifyDemandedVectorElts()
245 bool SimplifyDemandedBits(SDValue Op, const APInt &Demanded);
246 bool SimplifyDemandedVectorElts(SDValue Op, const APInt &Demanded,
1029 bool DAGCombiner::SimplifyDemandedBits(SDValue Op, const APInt &Demanded) { in SimplifyDemandedBits() argument
1032 if (!TLI.SimplifyDemandedBits(Op, Demanded, Known, TLO)) in SimplifyDemandedBits()
1051 bool DAGCombiner::SimplifyDemandedVectorElts(SDValue Op, const APInt &Demanded, in SimplifyDemandedVectorElts() argument
1055 if (!TLI.SimplifyDemandedVectorElts(Op, Demanded, KnownUndef, KnownZero, TLO, in SimplifyDemandedVectorElts()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 851 bool targetShrinkDemandedConstant(SDValue Op, const APInt &Demanded,
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| H A D | X86ISelLowering.cpp | 30017 const APInt &Demanded, in targetShrinkDemandedConstant() argument
30040 APInt ShrunkMask = Mask & Demanded; in targetShrinkDemandedConstant()
30064 if (!ZeroExtendMask.isSubsetOf(Mask | ~Demanded)) in targetShrinkDemandedConstant()
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