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Searched refs:DX (Results 1 – 25 of 46) sorted by relevance

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/freebsd-12.1/sys/netpfil/ipfw/test/
H A Dmain.c212 DX(3, "loop %d enq %d send %p rx %d", in mainloop()
246 DX(1, "mainloop ends %d", i); in mainloop()
260 DX(1, "done %d loops\n", c->loops); in dump()
277 DX(3, "empty string"); in getnum()
364 DX(4,"wrong parameters %s", s); in parse_flowsets()
480 DX(3, "using scheduler %s", c->name); in init()
484 DX(3, "setting max to %d", c->th_max); in init()
488 DX(3, "setting max to %d", c->th_max); in init()
492 DX(3, "setting max to %d", c->th_max); in init()
638 DX(1, "done ac %d av %p", ac, av); in main()
[all …]
H A Ddn_test.h28 #define DX(lev, fmt, args...) do { \ macro
/freebsd-12.1/libexec/bootpd/
H A DConvOldTab.sh40 set -u$DX
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86InstrArithmetic.td67 // AX,DX = AX*GR16
93 // AX,DX = AX*[mem16]
114 // AX,DX = AX*GR16
132 // AX,DX = AX*[mem16]
284 let Defs = [AX,DX,EFLAGS], Uses = [AX,DX] in
285 def DIV16r : I<0xF7, MRM6r, (outs), (ins GR16:$src), // DX:AX/r16 = AX,DX
299 let Defs = [AX,DX,EFLAGS], Uses = [AX,DX] in
300 def DIV16m : I<0xF7, MRM6m, (outs), (ins i16mem:$src), // DX:AX/[mem16] = AX,DX
316 let Defs = [AX,DX,EFLAGS], Uses = [AX,DX] in
317 def IDIV16r: I<0xF7, MRM7r, (outs), (ins GR16:$src), // DX:AX/r16 = AX,DX
[all …]
H A DX86RegisterInfo.td115 def DX : X86Reg<"dx", 2, [DL,DH]>;
143 def EDX : X86Reg<"edx", 2, [DX, HDX]>, DwarfRegNum<[-2, 2, 2]>;
398 (add AX, CX, DX, SI, DI, BX, BP, SP,
439 def GR16_ABCD : RegisterClass<"X86", [i16], 16, (add AX, CX, DX, BX)>;
459 (add AX, CX, DX, SI, DI, BX, BP, SP)>;
502 // A class to support the 'A' assembler constraint: [ER]AX then [ER]DX.
H A DX86CallingConv.td43 let GPR_16 = [AX, CX, DX, DI, SI];
63 let GPR_16 = [AX, CX, DX, DI, SI, R8W, R9W, R10W, R11W, R12W, R14W, R15W];
70 let GPR_16 = [AX, CX, DX, DI, SI, R8W, R9W, R12W, R13W, R14W, R15W];
206 // Scalar values are returned in AX first, then DX. For i8, the ABI
219 CCIfType<[i16], CCAssignToReg<[AX, DX, CX]>>,
284 CCIfType<[i16], CCAssignToReg<[AX, DX, CX]>>,
389 CCIfType<[i16], CCAssignToReg<[AX, DX, CX, R8W]>>,
626 CCIfType<[i16], CCAssignToRegWithShadow<[CX , DX , R8W , R9W ],
864 CCIfInReg<CCIfType<[i16], CCAssignToReg<[ CX, DX]>>>,
H A DX86InstrSystem.td71 let Defs = [AL], Uses = [DX] in
73 let Defs = [AX], Uses = [DX] in
76 let Defs = [EAX], Uses = [DX] in
90 let Uses = [DX, AL] in
92 let Uses = [DX, AX] in
95 let Uses = [DX, EAX] in
H A DX86InstrExtension.td22 let Defs = [AX,DX], Uses = [AX] in // DX:AX = signext(AX)
/freebsd-12.1/sys/i386/i386/
H A Ddb_disasm.c68 #define DX 13 /* dx, for IO */ macro
701 /*6c*/ { "ins", FALSE, BYTE, op2(DX, DI), 0 },
702 /*6d*/ { "ins", FALSE, LONG, op2(DX, DI), 0 },
703 /*6e*/ { "outs", FALSE, BYTE, op2(SI, DX), 0 },
704 /*6f*/ { "outs", FALSE, LONG, op2(SI, DX), 0 },
845 /*ec*/ { "in", FALSE, BYTE, op2(DX, A), 0 },
846 /*ed*/ { "in", FALSE, LONG, op2(DX, A) , 0 },
847 /*ee*/ { "out", FALSE, BYTE, op2(A, DX), 0 },
848 /*ef*/ { "out", FALSE, LONG, op2(A, DX) , 0 },
1409 case DX: in db_disasm()
H A Dbpf_jit_machdep.h53 #define DX 2 macro
/freebsd-12.1/contrib/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCTargetDesc.cpp94 {codeview::RegisterId::DX, X86::DX}, in initLLVMToSEHAndCVRegMapping()
578 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: in getX86SubSuperRegisterOrZero()
590 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: in getX86SubSuperRegisterOrZero()
627 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: in getX86SubSuperRegisterOrZero()
628 return X86::DX; in getX86SubSuperRegisterOrZero()
663 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: in getX86SubSuperRegisterOrZero()
699 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: in getX86SubSuperRegisterOrZero()
/freebsd-12.1/sys/amd64/amd64/
H A Ddb_disasm.c81 #define DX 13 /* dx, for IO */ macro
786 /*6c*/ { "ins", FALSE, BYTE, op2(DX, DI), 0 },
787 /*6d*/ { "ins", FALSE, LONG, op2(DX, DI), 0 },
788 /*6e*/ { "outs", FALSE, BYTE, op2(SI, DX), 0 },
789 /*6f*/ { "outs", FALSE, LONG, op2(SI, DX), 0 },
930 /*ec*/ { "in", FALSE, BYTE, op2(DX, A), 0 },
931 /*ed*/ { "in", FALSE, LONG, op2(DX, A) , 0 },
932 /*ee*/ { "out", FALSE, BYTE, op2(A, DX), 0 },
933 /*ef*/ { "out", FALSE, LONG, op2(A, DX) , 0 },
1616 case DX: in db_disasm()
H A Dbpf_jit_machdep.h78 #define DX 2 macro
/freebsd-12.1/usr.bin/lastcomm/tests/
H A Dv1-amd64.out2 core -DX root 0.000 secs 0.000 us 0.000 sy 0.000 es Wed May 16 11:44
H A Dv1-sparc64.out2 core -DX root 0.031 secs 0.000 us 0.031 sy 0.047 es Wed May 16 12:16
H A Dv2-i386.out2 core -DX root 0.002 secs 0.000 us 0.002 sy 0.005 es Fri May 18 12:13
H A Dv2-amd64.out2 core -DX root 0.005 secs 0.000 us 0.005 sy 0.010 es Thu May 17 05:57
H A Dv1-i386.out2 core -DX root 0.000 secs 0.000 us 0.000 sy 0.031 es Fri May 18 08:34
H A Dv2-sparc64.out2 core -DX root 0.037 secs 0.001 us 0.036 sy 0.055 es Sat May 19 09:17
/freebsd-12.1/libexec/getty/
H A Dgettytab.h170 #define DX gettyflags[20].value macro
/freebsd-12.1/sys/netpfil/ipfw/
H A Ddn_aqm_pie.c490 DX(2, "PIE queue is not initialized\n"); in aqm_pie_enqueue()
583 DX(2, "AQM_PIE is not configured"); in aqm_pie_init()
H A Dip_dummynet.c1096 DX(3, "sched %d has %d flowsets", s->sch.sched_nr, n); in copy_fsk_list()
1672 DX(2, "fs %d changed sched %d@%p to %d@%p", in config_fs()
1810 DX(2, "sched %d new type %s", i, a.fp->name); in config_sched()
1814 DX(2, "sched %d type changed from %s to %s", in config_sched()
1816 DX(4, " type/sub %d/%d -> %d/%d", in config_sched()
1837 DX(4, "sched %d unchanged type %s", i, a.fp->name); in config_sched()
1967 DX(4, "still %d unlinked fs", dn_cfg.fsk_count); in dummynet_flush()
H A Dip_dn_private.h48 #define DX(lev, fmt, ...) do { \ macro
/freebsd-12.1/contrib/ntp/html/hints/
H A Dbsdi45 /var/log/ntp.drift, and the authdelay on my 486DX/50 system is
/freebsd-12.1/contrib/llvm/include/llvm/DebugInfo/CodeView/
H A DCodeViewRegisters.def55 CV_REGISTER(DX, 11)

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