Searched refs:CondReg0 (Results 1 – 1 of 1) sorted by relevance
3711 unsigned CondReg0 = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass); in emitLoadSRsrcFromVGPRLoop() local3745 BuildMI(LoopBB, I, DL, TII.get(AMDGPU::V_CMP_EQ_U64_e64), CondReg0) in emitLoadSRsrcFromVGPRLoop()3752 .addReg(CondReg0) in emitLoadSRsrcFromVGPRLoop()