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Searched refs:CS1 (Results 1 – 25 of 40) sorted by relevance

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/freebsd-12.1/sys/dev/cx/
H A Dcsigma.c288 ! cx_probe_chip (CS1(port))) in cx_probe_board()
292 else if (c3 && ! cx_probe_chip (CS1(port + 0x10))) in cx_probe_board()
350 port = ((rev & BSR_VAR_MASK) != CRONYX_400) ? CS0(b->port) : CS1(b->port); in cx_probe_irq()
383 port = ((rev & BSR_VAR_MASK) != CRONYX_400) ? CS0(port) : CS1(port); in cx_chip_revision()
553 CS1A(port) : CS1(port); in cx_init_board()
555 b->chan[i+12].port = CS1(port+0x10); in cx_init_board()
780 CS1A(port) : CS1(port); in cx_init_800()
782 b->chan[i+12].port = CS1(port+0x10); in cx_init_800()
836 b->chan[i+4].port = CS1(port); in cx_init_2x()
838 b->chan[i+12].port = CS1(port+0x10); in cx_init_2x()
H A Dcxreg.h26 #define CS1(p) ((p) | 0xc000) /* chip select 1 */ macro
/freebsd-12.1/sys/mips/conf/
H A DROUTERSTATION.hints27 # This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
H A DRSPRO.hints28 # This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
H A DTL-WR740Nv4.hints81 # This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
H A DTP-MR3020.hints87 # This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
H A DTP-MR3040.hints92 # This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
H A DAP121.hints86 # This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
H A DCARAMBOLA2.hints101 # This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
H A DAP143.hints91 # This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
H A DALFA_HORNET_UB.hints95 # This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
H A DTP-WN1043ND.hints83 # This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
H A DWZR-HPAG300H.hints107 # Pin 13 - CS1
H A DDIR-825B1.hints74 # This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
/freebsd-12.1/sys/gnu/dts/arm/
H A Darmada-370-xp.dtsi273 <MBUS_ID(0x01, 0x5e) 0 0xffffffff>, /* CS1 */
291 <MBUS_ID(0x01, 0x5a) 0 0xffffffff>, /* CS1 */
H A Darmada-388-clearfog.dts176 * CS1:
H A Dimx6qdl-ts4900.dtsi166 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 /* Onboard flash CS1# */
176 MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x100b1 /* FPGA CS1# */
H A Dimx6dl-riotboard.dts402 MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x000b1 /* CS1 */
416 MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x000b1 /* CS1 */
H A Domap3-overo-common-lcd35.dtsi126 reg = <1>; /* CS1 */
H A Domap3430-sdp.dts54 <1 0 0x28000000 0x1000000>, /* CS1: 16MB for NAND */
H A Darmada-388-clearfog.dtsi231 * CS1: PIC microcontroller (Pro models)
H A Darmada-385-turris-omnia.dts344 /* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
H A Dlogicpd-som-lv-baseboard.dtsi67 1 0 0x2c000000 0x1000000 /* CS1: 16MB for LAN9221 */
H A Dimx6dl-colibri-eval-v3.dts231 /* weim memory map: 32MB on CS0, CS1, CS2 and CS3 */
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.td156 def CS1: Rc<13, "cs1", ["c13"]>, DwarfRegNum<[80]>;
175 def CS : Rcc<12, "c13:12", [CS0, CS1], ["cs1:0"]>, DwarfRegNum<[78]>;
364 (add LC0, SA0, LC1, SA1, P3_0, C5, C8, PC, UGP, GP, CS0, CS1,

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