| /freebsd-12.1/contrib/llvm/include/llvm/MC/ |
| H A D | MCInstrAnalysis.h | 110 unsigned CPUID) const { in isZeroIdiom() argument 135 unsigned CPUID) const { in isDependencyBreaking() argument 136 return isZeroIdiom(MI, Mask, CPUID); in isDependencyBreaking() 146 unsigned CPUID) const { in isOptimizableRegisterMove() argument
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| H A D | MCSubtargetInfo.h | 165 unsigned CPUID) const { in resolveVariantSchedClass() argument
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| /freebsd-12.1/sys/sparc64/include/ |
| H A D | ktr.h | 64 lduw [PCPU(CPUID)], r2 ; \ 78 lduw [PCPU(CPUID)], r2 ; \ 85 lduw [PCPU(CPUID)], r2 ; \ 90 lduw [PCPU(CPUID)], r2 ; \
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| /freebsd-12.1/contrib/llvm/lib/MC/ |
| H A D | MCSchedule.cpp | 76 unsigned CPUID = getProcessorID(); in computeInstrLatency() local 78 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in computeInstrLatency() 122 unsigned CPUID = getProcessorID(); in getReciprocalThroughput() local 124 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, CPUID); in getReciprocalThroughput()
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| /freebsd-12.1/sys/amd64/vmm/intel/ |
| H A D | vmx_support.S | 155 movl PCPU(CPUID), %eax 231 movl PCPU(CPUID), %r10d 255 movl PCPU(CPUID), %r10d 298 movl PCPU(CPUID), %r10d
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| /freebsd-12.1/contrib/llvm/tools/llvm-mca/Views/ |
| H A D | InstructionInfoView.cpp | 38 unsigned CPUID = SM.getProcessorID(); in printView() local 42 SchedClassID = STI.resolveVariantSchedClass(SchedClassID, &Inst, CPUID); in printView()
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| /freebsd-12.1/lib/libpmc/pmu-events/ |
| H A D | README | 108 CPUID,Version,Dir/path/name,Type 124 CPUID: 125 CPUID is an arch-specific char string, that can be used 131 CPUID == 'GenuineIntel-6-2E' (on x86). 132 CPUID == '004b0100' (PVR value in Powerpc)
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| /freebsd-12.1/crypto/openssl/doc/man3/ |
| H A D | OPENSSL_ia32cap.pod | 15 by processor in EDX:ECX register pair after executing CPUID instruction 80 variable" terms. The truth is that it's not copied from CPUID output 87 CPUID with EAX=7 and ECX=0 as input. Following bits are significant:
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| /freebsd-12.1/sys/sparc64/sparc64/ |
| H A D | mp_exception.S | 42 lduw [PCPU(CPUID)], r2 ; \ 171 lduw [PCPU(CPUID)], %g2
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| H A D | swtch.S | 169 lduw [PCPU(CPUID)], %l3 235 lduw [PCPU(CPUID)], %l3
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| H A D | mp_locore.S | 280 lduw [PCPU(CPUID)], %g2
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| /freebsd-12.1/sys/i386/i386/ |
| H A D | swtch.s | 76 movl PCPU(CPUID), %esi 166 movl PCPU(CPUID),%esi
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| H A D | apic_vector.s | 324 movl PCPU(CPUID), %eax
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| /freebsd-12.1/sys/amd64/amd64/ |
| H A D | apic_vector.S | 265 movl PCPU(CPUID), %eax
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| /freebsd-12.1/contrib/llvm/lib/MCA/ |
| H A D | InstrBuilder.cpp | 512 unsigned CPUID = SM.getProcessorID(); in createInstrDescImpl() local 514 SchedClassID = STI.resolveVariantSchedClass(SchedClassID, &MCI, CPUID); in createInstrDescImpl()
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| /freebsd-12.1/contrib/binutils/opcodes/ |
| H A D | ia64-raw.tbl | 44 CPUID#; IC:none; IC:mov-from-IND-CPUID+3; specific 192 PSR.vm; vmsw; IC:mem-readers, IC:mem-writers, IC:mov-from-AR-ITC, IC:mov-from-IND-CPUID, IC:mov-to-… 193 PSR.vm; rfi; IC:mem-readers, IC:mem-writers, IC:mov-from-AR-ITC, IC:mov-from-IND-CPUID, IC:mov-to-A…
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| H A D | ia64-ic.tbl | 123 mov-from-IND-CPUID; IC:mov-from-IND[Field(ireg) == cpuid] 189 mov-to-IND-CPUID; IC:mov-to-IND[Field(ireg) == cpuid]
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| H A D | ia64-waw.tbl | 43 CPUID#; IC:none; IC:none; none
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| /freebsd-12.1/contrib/openmp/runtime/src/ |
| H A D | z_Windows_NT-586_asm.asm | 91 cpuid ; Query the CPUID for the current processor 651 cpuid ; Query the CPUID for the current processor
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| /freebsd-12.1/contrib/binutils/include/opcode/ |
| H A D | convex.h | 63 #define CPUID 20 macro 995 {0,0,lr,CPUID,S,0}, /* mov */
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| /freebsd-12.1/sys/amd64/conf/ |
| H A D | NOTES | 591 # CPU control pseudo-device. Provides access to MSRs, CPUID info and
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86ScheduleAtom.td | 841 def : InstRW<[AtomWrite01_121], (instrs CPUID)>;
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| H A D | X86InstrSystem.td | 435 def CPUID : I<0xA2, RawFrm, (outs), (ins), "cpuid", []>, TB;
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| H A D | X86SchedBroadwell.td | 1390 def: InstRW<[BWWriteResGroup159], (instrs CPUID)>;
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| /freebsd-12.1/sys/i386/conf/ |
| H A D | NOTES | 875 # CPU control pseudo-device. Provides access to MSRs, CPUID info and
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