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Searched refs:COMBINE (Results 1 – 7 of 7) sorted by relevance

/freebsd-12.1/lib/libc/quad/
H A Dqdivrem.c155 rbj = COMBINE(u[1] % t, u[2]);
157 rbj = COMBINE(rbj % t, u[3]);
159 rbj = COMBINE(rbj % t, u[4]);
163 tmp.ul[H] = COMBINE(q1, q2);
164 tmp.ul[L] = COMBINE(q3, q4);
218 u_long n = COMBINE(uj0, uj1);
222 while (v2 * qhat > COMBINE(rhat, uj2)) {
271 tmp.ul[H] = COMBINE(uspace[1], uspace[2]);
272 tmp.ul[L] = COMBINE(uspace[3], uspace[4]);
276 tmp.ul[H] = COMBINE(qspace[1], qspace[2]);
[all …]
/freebsd-12.1/sys/libkern/
H A Dqdivrem.c151 rbj = COMBINE(u[1] % t, u[2]); in __qdivrem()
153 rbj = COMBINE(rbj % t, u[3]); in __qdivrem()
155 rbj = COMBINE(rbj % t, u[4]); in __qdivrem()
159 tmp.ul[H] = COMBINE(q1, q2); in __qdivrem()
160 tmp.ul[L] = COMBINE(q3, q4); in __qdivrem()
214 u_long nn = COMBINE(uj0, uj1); in __qdivrem()
218 while (v2 * qhat > COMBINE(rhat, uj2)) { in __qdivrem()
267 tmp.ul[H] = COMBINE(uspace[1], uspace[2]); in __qdivrem()
268 tmp.ul[L] = COMBINE(uspace[3], uspace[4]); in __qdivrem()
272 tmp.ul[H] = COMBINE(qspace[1], qspace[2]); in __qdivrem()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1625 case HexagonISD::COMBINE: return "HexagonISD::COMBINE"; in getTargetNodeName()
1957 SDValue Concat10 = DAG.getNode(HexagonISD::COMBINE, dl, in LowerVECTOR_SHUFFLE()
1964 SDValue Concat01 = DAG.getNode(HexagonISD::COMBINE, dl, in LowerVECTOR_SHUFFLE()
2235 return DAG.getNode(HexagonISD::COMBINE, dl, VecTy, {H, L}); in buildVector64()
2352 ValR = DAG.getNode(HexagonISD::COMBINE, dl, MVT::i64, in insertVector()
2483 return DAG.getNode(HexagonISD::COMBINE, dl, VecTy, Op.getOperand(1), in LowerCONCAT_VECTORS()
2507 W = DAG.getNode(HexagonISD::COMBINE, dl, MVT::i64, in LowerCONCAT_VECTORS()
2533 SDValue WW = DAG.getNode(HexagonISD::COMBINE, dl, MVT::i64, in LowerCONCAT_VECTORS()
H A DHexagonISelLowering.h55 COMBINE, enumerator
H A DHexagonISelLoweringHVX.cpp800 SDValue WW = DAG.getNode(HexagonISD::COMBINE, dl, MVT::i64, {W1, W0}); in extractHvxSubvectorReg()
863 SDValue Vec64 = DAG.getNode(HexagonISD::COMBINE, dl, MVT::v8i8, {W1, W0}); in extractHvxSubvectorPred()
H A DHexagonPatterns.td953 def HexagonCOMBINE: SDNode<"HexagonISD::COMBINE", SDTHexagonI64I32I32>;
/freebsd-12.1/contrib/llvm/tools/clang/include/clang/Basic/
H A Darm_neon.td885 def COMBINE : NoTestOpInst<"vcombine", "kdd", "dPl", OP_CONC>;