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Searched refs:BitVector (Results 1 – 25 of 203) sorted by relevance

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/freebsd-12.1/contrib/llvm/include/llvm/ADT/
H A DBitVector.h74 class BitVector {
148 BitVector(const BitVector &RHS) : Size(RHS.size()) { in BitVector() function
159 BitVector(BitVector &&RHS) : Bits(RHS.Bits), Size(RHS.Size) { in BitVector() function
398 BitVector &set() { in set()
560 BitVector &operator&=(const BitVector &RHS) {
577 BitVector &reset(const BitVector &RHS) { in reset()
603 BitVector &operator|=(const BitVector &RHS) {
611 BitVector &operator^=(const BitVector &RHS) {
719 const BitVector &operator=(const BitVector &RHS) {
744 const BitVector &operator=(BitVector &&RHS) {
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H A DSmallBitVector.h95 BitVector *getPointer() const { in getPointer()
97 return reinterpret_cast<BitVector *>(X); in getPointer()
106 void switchToLarge(BitVector *BV) { in switchToLarge()
150 switchToLarge(new BitVector(s, t));
158 switchToLarge(new BitVector(*RHS.getPointer())); in SmallBitVector()
338 BitVector *BV = new BitVector(N, t);
351 BitVector *BV = new BitVector(SmallSize); in reserve()
606 switchToLarge(new BitVector(*RHS.getPointer()));
/freebsd-12.1/contrib/llvm/lib/Support/
H A DGlobPattern.cpp28 static Expected<BitVector> expand(StringRef S, StringRef Original) { in expand()
29 BitVector BV(256, false); in expand()
67 static Expected<BitVector> scan(StringRef &S, StringRef Original) { in scan()
73 return BitVector(); in scan()
76 return BitVector(256, true); in scan()
86 Expected<BitVector> BV = expand(Chars.substr(1), Original); in scan()
94 BitVector BV(256, false); in scan()
127 Expected<BitVector> BV = scan(S, Original); in create()
146 bool GlobPattern::matchOne(ArrayRef<BitVector> Pats, StringRef S) const { in matchOne()
/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DSafeStackColoring.h44 BitVector Begin;
47 BitVector End;
50 BitVector LiveIn;
53 BitVector LiveOut;
60 BitVector bv;
98 BitVector InterestingAllocas;
141 static inline raw_ostream &operator<<(raw_ostream &OS, const BitVector &V) {
H A DLiveRangeCalc.h63 BitVector Seen;
76 using EntryInfoMap = DenseMap<LiveRange *, std::pair<BitVector, BitVector>>;
130 MachineBasicBlock &MBB, BitVector &DefOnEntry,
131 BitVector &UndefOnEntry);
H A DSpillPlacement.h38 class BitVector; variable
54 BitVector *ActiveNodes;
108 void prepare(BitVector &RegBundles);
H A DRegUsageInfoCollector.cpp62 static void computeCalleeSavedRegs(BitVector &SavedRegs, MachineFunction &MF);
105 BitVector SavedRegs; in runOnMachineFunction()
108 const BitVector &UsedPhysRegsMask = MRI->getUsedPhysRegsMask(); in runOnMachineFunction()
151 computeCalleeSavedRegs(BitVector &SavedRegs, MachineFunction &MF) { in computeCalleeSavedRegs()
H A DStackColoring.cpp390 BitVector Begin;
393 BitVector End;
396 BitVector LiveIn;
399 BitVector LiveOut;
431 BitVector InterestingSlots;
435 BitVector ConservativeSlots;
458 void dumpBV(const char *tag, const BitVector &BV) const;
643 BitVector BetweenStartEnd; in collectMarkers()
693 BitVector &SeenStart = SeenStartMap[MBB]; in collectMarkers()
775 BitVector LocalLiveIn; in calculateLocalLiveness()
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H A DTargetRegisterInfo.cpp59 void TargetRegisterInfo::markSuperRegs(BitVector &RegisterSet, unsigned Reg) in markSuperRegs()
65 bool TargetRegisterInfo::checkAllSuperRegsMarked(const BitVector &RegisterSet, in checkAllSuperRegsMarked()
68 BitVector Checked(getNumRegs()); in checkAllSuperRegsMarked()
211 const TargetRegisterClass *RC, BitVector &R){ in getAllocatableSetForRC()
218 BitVector TargetRegisterInfo::getAllocatableSet(const MachineFunction &MF, in getAllocatableSet()
220 BitVector Allocatable(getNumRegs()); in getAllocatableSet()
233 BitVector Reserved = getReservedRegs(MF); in getAllocatableSet()
H A DLiveRangeCalc.cpp277 MachineBasicBlock &MBB, BitVector &DefOnEntry, in isDefOnEntry()
278 BitVector &UndefOnEntry) { in isDefOnEntry()
455 std::make_pair(&LR, std::make_pair(BitVector(), BitVector()))); in findReachingDefs()
462 BitVector &DefOnEntry = Entry->second.first; in findReachingDefs()
463 BitVector &UndefOnEntry = Entry->second.second; in findReachingDefs()
592 BitVector DefBlocks(MF.getNumBlockIDs()); in isJointlyDominated()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DRegisterScavenging.h68 BitVector KillRegUnits, DefRegUnits;
69 BitVector TmpRegUnits;
126 BitVector getRegsAvailable(const TargetRegisterClass *RC);
186 void setUsed(const BitVector &RegUnits) { in setUsed()
189 void setUnused(const BitVector &RegUnits) { in setUnused()
198 void addRegUnits(BitVector &BV, unsigned Reg);
201 void removeRegUnits(BitVector &BV, unsigned Reg);
208 BitVector &Candidates,
H A DLiveRegUnits.h33 BitVector Units;
146 void addUnits(const BitVector &RegUnits) { in addUnits()
150 void removeUnits(const BitVector &RegUnits) { in removeUnits()
154 const BitVector &getBitVector() const { in getBitVector()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonGenMux.cpp101 BitVector Defs, Uses;
104 DefUseInfo(const BitVector &D, const BitVector &U) : Defs(D), Uses(U) {} in DefUseInfo()
128 void getSubRegs(unsigned Reg, BitVector &SRs) const;
129 void expandReg(unsigned Reg, BitVector &Set) const;
130 void getDefsUses(const MachineInstr *MI, BitVector &Defs,
131 BitVector &Uses) const;
147 void HexagonGenMux::getSubRegs(unsigned Reg, BitVector &SRs) const { in getSubRegs()
152 void HexagonGenMux::expandReg(unsigned Reg, BitVector &Set) const { in expandReg()
160 BitVector &Uses) const { in getDefsUses()
176 BitVector &Set = MO.isDef() ? Defs : Uses; in getDefsUses()
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H A DHexagonFrameLowering.h23 class BitVector; variable
74 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
123 BitVector &DoneT, BitVector &DoneF, BitVector &Path) const;
H A DRDFRegisters.cpp33 BitVector BadRC(TRI.getNumRegs()); in PhysicalRegisterInfo()
86 BitVector PU(TRI.getNumRegUnits()); in PhysicalRegisterInfo()
256 BitVector T(PRI.getMaskUnits(RR.Reg)); in hasCoverOf()
325 auto AliasedRegs = [this] (uint32_t Unit, BitVector &Regs) { in makeRegRef()
335 BitVector Regs(PRI.getTRI().getNumRegs()); in makeRegRef()
342 BitVector AR(PRI.getTRI().getNumRegs()); in makeRegRef()
/freebsd-12.1/contrib/llvm/include/llvm/Support/
H A DGlobPattern.h27 class BitVector; variable
36 bool matchOne(ArrayRef<BitVector> Pat, StringRef S) const;
39 std::vector<BitVector> Tokens;
H A DCodeGenCoverage.h23 BitVector RuleCoverage;
26 using const_covered_iterator = BitVector::const_set_bits_iterator;
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DR600RegisterInfo.cpp32 BitVector R600RegisterInfo::getReservedRegs(const MachineFunction &MF) const { in getReservedRegs()
33 BitVector Reserved(getNumRegs()); in getReservedRegs()
116 void R600RegisterInfo::reserveRegisterTuples(BitVector &Reserved, unsigned Reg) const { in reserveRegisterTuples()
H A DSIRegisterInfo.h33 BitVector SGPRPressureSets;
34 BitVector VGPRPressureSets;
39 BitVector &PressureSets) const;
62 BitVector getReservedRegs(const MachineFunction &MF) const override;
H A DR600RegisterInfo.h28 BitVector getReservedRegs(const MachineFunction &MF) const override;
52 void reserveRegisterTuples(BitVector &Reserved, unsigned Reg) const;
/freebsd-12.1/contrib/llvm/tools/clang/include/clang/Analysis/Analyses/
H A DReachableCode.h24 class BitVector; variable
62 llvm::BitVector &Reachable);
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMipsDelaySlotFiller.cpp131 bool checkRegDefsUses(BitVector &NewDefs, BitVector &NewUses, unsigned Reg,
135 bool isRegInSet(const BitVector &RegSet, unsigned Reg) const;
138 BitVector Defs, Uses;
379 BitVector CallerSavedRegs(TRI.getNumRegs(), true); in setCallerSaved()
393 BitVector AllocSet = TRI.getAllocatableSet(MF); in setUnallocatableRegs()
415 BitVector NewDefs(TRI.getNumRegs()), NewUses(TRI.getNumRegs()); in update()
431 bool RegDefsUses::checkRegDefsUses(BitVector &NewDefs, BitVector &NewUses, in checkRegDefsUses()
444 bool RegDefsUses::isRegInSet(const BitVector &RegSet, unsigned Reg) const { in isRegInSet()
/freebsd-12.1/contrib/llvm/lib/Target/Lanai/
H A DLanaiFrameLowering.h22 class BitVector; variable
51 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
/freebsd-12.1/contrib/llvm/utils/TableGen/
H A DCodeGenRegisters.h297 BitVector SubClasses;
323 BitVector TopoSigs;
400 BitVector &Out) const;
411 const BitVector &getSubClasses() const { return SubClasses; } in getSubClasses()
434 const BitVector &getTopoSigs() const { return TopoSigs; } in getTopoSigs()
767 BitVector computeCoveredRegisters(ArrayRef<Record*> Regs);
/freebsd-12.1/contrib/llvm/include/llvm/DebugInfo/PDB/
H A DUDTLayout.h52 const BitVector &usedBytes() const { return UsedBytes; } in usedBytes()
65 BitVector UsedBytes;
174 BitVector ImmediateUsedBytes;

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