Home
last modified time | relevance | path

Searched refs:Base1 (Results 1 – 7 of 7) sorted by relevance

/freebsd-12.1/contrib/llvm/tools/clang/lib/AST/
H A DASTStructuralEquivalence.cpp1060 for (CXXRecordDecl::base_class_iterator Base1 = D1CXX->bases_begin(), in IsStructurallyEquivalent() local
1063 Base1 != BaseEnd1; ++Base1, ++Base2) { in IsStructurallyEquivalent()
1064 if (!IsStructurallyEquivalent(Context, Base1->getType(), in IsStructurallyEquivalent()
1072 Context.Diag1(Base1->getBeginLoc(), diag::note_odr_base) in IsStructurallyEquivalent()
1073 << Base1->getType() << Base1->getSourceRange(); in IsStructurallyEquivalent()
1079 if (Base1->isVirtual() != Base2->isVirtual()) { in IsStructurallyEquivalent()
1086 Context.Diag1(Base1->getBeginLoc(), diag::note_odr_base) in IsStructurallyEquivalent()
1087 << Base1->isVirtual() << Base1->getSourceRange(); in IsStructurallyEquivalent()
1134 const CXXBaseSpecifier *Base1 = D1CXX->bases_begin(); in IsStructurallyEquivalent() local
1135 Context.Diag1(Base1->getBeginLoc(), diag::note_odr_base) in IsStructurallyEquivalent()
[all …]
H A DASTImporter.cpp1802 for (const auto &Base1 : FromCXX->bases()) { in ImportDefinition() local
1803 ExpectedType TyOrErr = import(Base1.getType()); in ImportDefinition()
1808 if (Base1.isPackExpansion()) { in ImportDefinition()
1809 if (ExpectedSLoc LocOrErr = import(Base1.getEllipsisLoc())) in ImportDefinition()
1817 ImportDefinitionIfNeeded(Base1.getType()->getAsCXXRecordDecl())) in ImportDefinition()
1820 auto RangeOrErr = import(Base1.getSourceRange()); in ImportDefinition()
1824 auto TSIOrErr = import(Base1.getTypeSourceInfo()); in ImportDefinition()
1831 Base1.isVirtual(), in ImportDefinition()
1832 Base1.isBaseOfClass(), in ImportDefinition()
1833 Base1.getAccessSpecifierAsWritten(), in ImportDefinition()
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp1486 SDValue Base1 = DAG.getMemBasePlusOffset(Base0, HwLen, dl); in SplitHvxMemOp() local
1500 SDValue Load1 = DAG.getLoad(SingleTy, dl, Chain, Base1, MOp1); in SplitHvxMemOp()
1509 SDValue Store1 = DAG.getStore(Chain, dl, Vals.second, Base1, MOp1); in SplitHvxMemOp()
H A DHexagonISelLowering.cpp2672 SDValue Base1 = DAG.getMemBasePlusOffset(BaseNoOff, BO.second+LoadLen, dl); in LowerUnalignedLoad() local
2684 SDValue Load1 = DAG.getLoad(LoadTy, dl, Chain, Base1, WideMMO); in LowerUnalignedLoad()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp401 auto Base1 = MO1->getValue(); in memOpsHaveSameBasePtr() local
403 if (!Base1 || !Base2) in memOpsHaveSameBasePtr()
407 Base1 = GetUnderlyingObject(Base1, DL); in memOpsHaveSameBasePtr()
408 Base2 = GetUnderlyingObject(Base1, DL); in memOpsHaveSameBasePtr()
410 if (isa<UndefValue>(Base1) || isa<UndefValue>(Base2)) in memOpsHaveSameBasePtr()
413 return Base1 == Base2; in memOpsHaveSameBasePtr()
/freebsd-12.1/contrib/llvm/tools/clang/lib/Sema/
H A DSemaChecking.cpp13406 Base1 = D1CXX->bases_begin(), in isLayoutCompatibleStruct() local
13409 Base1 != BaseEnd1; in isLayoutCompatibleStruct()
13410 ++Base1, ++Base2) { in isLayoutCompatibleStruct()
13411 if (!isLayoutCompatible(C, Base1->getType(), Base2->getType())) in isLayoutCompatibleStruct()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp11088 SDValue Base1 = Loc, Base2 = BaseLoc; in isConsecutiveLSLoc() local
11090 getBaseWithConstantOffset(Loc, Base1, Offset1, DAG); in isConsecutiveLSLoc()
11092 if (Base1 == Base2 && Offset1 == (Offset2 + Dist * Bytes)) in isConsecutiveLSLoc()