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Searched refs:Available (Results 1 – 25 of 45) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZMachineScheduler.cpp162 if (Available.empty()) in pickNode()
166 if (Available.size() == 1) { in pickNode()
168 HazardRec->dumpSU(*Available.begin(), dbgs()); dbgs() << "\n";); in pickNode()
169 return *Available.begin(); in pickNode()
173 LLVM_DEBUG(dbgs() << "** Available: "; Available.dump(*HazardRec);); in pickNode()
176 for (auto *SU : Available) { in pickNode()
243 if (Available.size() == 1) dbgs() << "(only one) "; in schedNode()
247 Available.erase(SU); in schedNode()
259 Available.insert(SU); in releaseTopNode()
H A DSystemZMachineScheduler.h97 SUSet Available; variable
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DR600MachineScheduler.cpp66 (Available[CurInstKind].empty()); in pickNode()
68 (!Available[IDFetch].empty() || !Available[IDOther].empty()); in pickNode()
70 if (CurInstKind == IDAlu && !Available[IDFetch].empty()) { in pickNode()
77 (FetchInstCount + Available[IDFetch].size()); in pickNode()
93 unsigned NearRegisterRequirement = 2 * Available[IDFetch].size(); in pickNode()
177 MoveUnits(Pending[IDFetch], Available[IDFetch]); in schedNode()
205 Available[IDOther].push_back(SU); in releaseBottomNode()
456 std::vector<SUnit *> &AQ = Available[QID]; in pickOther()
H A DR700Instructions.td11 // - Available to R700 and newer VLIW4/VLIW5 GPUs
12 // - Available only on R700 family GPUs.
H A DR600MachineScheduler.h54 std::vector<SUnit *> Available[IDLast], Pending[IDLast]; variable
H A DGCNSchedStrategy.cpp150 ReadyQueue &Q = Zone.Available; in pickNodeFromQueue()
253 assert(Top.Available.empty() && Top.Pending.empty() && in pickNode()
254 Bot.Available.empty() && Bot.Pending.empty() && "ReadyQ garbage"); in pickNode()
H A DEvergreenInstructions.td11 // - Available to Evergreen and newer VLIW4/VLIW5 GPUs
12 // - Available only on Evergreen family GPUs.
/freebsd-12.1/contrib/llvm/lib/Target/Hexagon/
H A DHexagonMachineScheduler.cpp357 Available.push(SU); in releaseNode()
420 if (Available.empty()) in releasePending()
438 Available.push(SU); in releasePending()
447 if (Available.isInQueue(SU)) in removeReady()
448 Available.remove(Available.find(SU)); in removeReady()
463 if (Available.empty()) in pickOnlyChoice()
465 if (Available.size() == 1 && Pending.size() > 0) in pickOnlyChoice()
467 getWeakLeft(*Available.begin(), isTop()) != 0; in pickOnlyChoice()
477 if (Available.size() == 1) in pickOnlyChoice()
478 return *Available.begin(); in pickOnlyChoice()
[all …]
H A DHexagonMachineScheduler.h138 ReadyQueue Available; member
158 : Available(ID, Name+".A"), in VLIWSchedBoundary()
193 return Available.getID() == ConvergingVLIWScheduler::TopQID; in isTop()
/freebsd-12.1/contrib/llvm/lib/CodeGen/
H A DMachineScheduler.cpp1873 Available.clear(); in reset()
2086 Available.push(SU); in releaseNode()
2316 if (Available.empty()) in releasePending()
2338 Available.push(SU); in releasePending()
2347 if (Available.isInQueue(SU)) in removeReady()
2348 Available.remove(Available.find(SU)); in removeReady()
2364 for (ReadyQueue::iterator I = Available.begin(); I != Available.end();) { in pickOnlyChoice()
2367 I = Available.remove(I); in pickOnlyChoice()
2383 LLVM_DEBUG(Available.dump()); in pickOnlyChoice()
2385 if (Available.size() == 1) in pickOnlyChoice()
[all …]
H A DRegisterScavenging.cpp553 BitVector Available = getRegsAvailable(RC); in scavengeRegister() local
554 Available &= Candidates; in scavengeRegister()
555 if (Available.any()) in scavengeRegister()
556 Candidates = Available; in scavengeRegister()
/freebsd-12.1/contrib/llvm/lib/Target/Mips/
H A DMips16InstrInfo.cpp383 BitVector Available = rs.getRegsAvailable(&Mips::CPU16RegsRegClass); in loadImmediate() local
384 Available &= Candidates; in loadImmediate()
392 Reg = Available.find_first(); in loadImmediate()
404 Available.reset(Reg); in loadImmediate()
408 SpReg = Available.find_first(); in loadImmediate()
420 Available.reset(SpReg); in loadImmediate()
/freebsd-12.1/release/packages/
H A DMakefile.package39 hast_COMMENT= Highly Available Storage daemon
40 hast_DESC= Highly Available Storage daemon
/freebsd-12.1/contrib/llvm/lib/IR/
H A DSafepointIRVerifier.cpp506 AvailableValueSet &Available);
773 AvailableValueSet &Available) { in transferInstruction() argument
776 Available.clear(); in transferInstruction()
778 Available.insert(&I); in transferInstruction()
/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DMachineScheduler.h632 ReadyQueue Available; variable
695 Available(ID, Name+".A"), Pending(ID << LogMaxQID, Name+".P") { in SchedBoundary()
707 return Available.getID() == TopQID; in isTop()
/freebsd-12.1/sys/dts/
H A Dbindings-gpio.txt80 Available flags are listed in sys/conf.h. Following combination
/freebsd-12.1/usr.sbin/bsdconfig/timezone/share/
H A Dcountries.subr33 # Returns a single property of a given country. Available properties are:
H A Dcontinents.subr92 # Returns a single property of a given continent. Available properties are:
/freebsd-12.1/usr.sbin/pc-sysinstall/examples/
H A DREADME202 Available FileSystems:
244 Available Types:
/freebsd-12.1/tools/regression/sockets/unix_cmsg/
H A DREADME21 Available options
/freebsd-12.1/contrib/libpcap/msdos/
H A Dreadme.dos57 "USE_EXCEPT = 1" in common.dj. Available at:
/freebsd-12.1/share/examples/netgraph/
H A Dngctl17 Available commands:
/freebsd-12.1/contrib/llvm/lib/Target/AVR/
H A DAVRExpandPseudoInsts.cpp882 BitVector Available = RS.getRegsAvailable(&AVR::GPR8RegClass); in scavengeGPR8() local
883 Available &= Candidates; in scavengeGPR8()
885 signed Reg = Available.find_first(); in scavengeGPR8()
/freebsd-12.1/contrib/llvm/include/llvm/Target/
H A DTargetSchedule.td350 // SchedPredicates. Available variables are:
368 // if-statement's expression. Available variables are MI, SchedModel,
/freebsd-12.1/contrib/gcclibs/libiberty/
H A Dlibiberty.texi89 * Functions:: Available functions, macros, and global variables.

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