Searched refs:AddrIndexReg (Results 1 – 16 of 16) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86InsertPrefetch.cpp | 84 unsigned IndexReg = MI.getOperand(Op + X86::AddrIndexReg).getReg(); in IsMemOpCompatibleWithPrefetch() 219 X86::AddrIndexReg == 2 && X86::AddrDisp == 3 && in runOnMachineFunction() 230 Current->getOperand(MemOpOffset + X86::AddrIndexReg).getReg()) in runOnMachineFunction()
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| H A D | X86AsmPrinter.cpp | 264 const MachineOperand &IndexReg = MI->getOperand(Op+X86::AddrIndexReg); in printLeaMemReference() 303 printOperand(P, MI, Op+X86::AddrIndexReg, O, Modifier); in printLeaMemReference() 330 const MachineOperand &IndexReg = MI->getOperand(Op+X86::AddrIndexReg); in printIntelMemReference() 352 printOperand(P, MI, Op+X86::AddrIndexReg, O, Modifier, AsmVariant); in printIntelMemReference()
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| H A D | X86FixupLEAs.cpp | 347 LEA.getOperand(1 + X86::AddrIndexReg).getReg() == 0 && in isLEASimpleIncOrDec() 399 MachineOperand &q = MI.getOperand(AddrOffset + X86::AddrIndexReg); in processInstruction() 435 const MachineOperand &Index = MI.getOperand(1 + X86::AddrIndexReg); in processInstructionForSlowLEA() 487 const MachineOperand &Index = MI.getOperand(1 + X86::AddrIndexReg); in processInstrForSlow3OpLEA()
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| H A D | X86OptimizeLEAs.cpp | 194 &MI.getOperand(N + X86::AddrIndexReg), in getMemOpKey() 554 MI.getOperand(MemOpNo + X86::AddrIndexReg) in removeRedundantAddrCalc()
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| H A D | X86CallFrameOptimization.cpp | 425 (I->getOperand(X86::AddrIndexReg).getReg() != X86::NoRegister) || in collectCallInfo()
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| H A D | X86InstrInfo.h | 154 MI.getOperand(Op + X86::AddrIndexReg).isReg() && in isLeaMem()
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| H A D | X86SpeculativeLoadHardening.cpp | 1717 MI.getOperand(MemRefBeginIdx + X86::AddrIndexReg); in tracePredStateThroughBlocksAndHarden() 1790 MI.getOperand(MemRefBeginIdx + X86::AddrIndexReg); in tracePredStateThroughBlocksAndHarden() 2180 UseMI.getOperand(MemRefBeginIdx + X86::AddrIndexReg); in sinkPostLoadHardenedInst()
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| H A D | X86AvoidStoreForwardingBlocks.cpp | 317 MachineOperand &Index = MI->getOperand(AddrOffset + X86::AddrIndexReg); in isRelevantAddressingMode()
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| H A D | X86InstrInfo.cpp | 198 MI.getOperand(Op + X86::AddrIndexReg).isReg() && in isFrameOperand() 201 MI.getOperand(Op + X86::AddrIndexReg).getReg() == 0 && in isFrameOperand() 551 MI.getOperand(1 + X86::AddrIndexReg).isReg() && in isReallyTriviallyReMaterializable() 552 MI.getOperand(1 + X86::AddrIndexReg).getReg() == 0 && in isReallyTriviallyReMaterializable() 570 MI.getOperand(1 + X86::AddrIndexReg).isReg() && in isReallyTriviallyReMaterializable() 571 MI.getOperand(1 + X86::AddrIndexReg).getReg() == 0 && in isReallyTriviallyReMaterializable() 3238 if (MemOp.getOperand(MemRefBegin + X86::AddrIndexReg).getReg() != in getMemOperandWithOffset() 5823 !HasSameOp(X86::AddrIndexReg) || !HasSameOp(X86::AddrSegmentReg)) in areLoadsFromSameBasePtr()
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| H A D | X86MCInstLower.cpp | 360 Inst.getOperand(AddrBase + X86::AddrIndexReg).isReg() && in SimplifyShortMoveForm() 384 Inst.getOperand(AddrBase + X86::AddrIndexReg).getReg() != 0)) in SimplifyShortMoveForm()
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| H A D | X86FastISel.cpp | 232 X86::AddrIndexReg); in addFullAddress()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCCodeEmitter.cpp | 69 const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg); in Is16BitMemOperand() 211 const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg); in Is32BitMemOperand() 232 const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg); in Is64BitMemOperand() 386 const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg); in emitMemModRMByte() 752 unsigned IndexRegEnc = getX86RegEncoding(MI, MemOperand+X86::AddrIndexReg); in EmitVEXOpcodePrefix() 797 unsigned IndexRegEnc = getX86RegEncoding(MI, MemOperand+X86::AddrIndexReg); in EmitVEXOpcodePrefix() 812 unsigned IndexRegEnc = getX86RegEncoding(MI, MemOperand+X86::AddrIndexReg); in EmitVEXOpcodePrefix() 828 unsigned IndexRegEnc = getX86RegEncoding(MI, MemOperand+X86::AddrIndexReg); in EmitVEXOpcodePrefix() 1069 REX |= isREXExtendedReg(MI, MemOperand+X86::AddrIndexReg) << 1; // REX.X in DetermineREXPrefix() 1079 REX |= isREXExtendedReg(MI, MemOperand+X86::AddrIndexReg) << 1; // REX.X in DetermineREXPrefix() [all …]
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| H A D | X86BaseInfo.h | 35 AddrIndexReg = 2, enumerator
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/InstPrinter/ |
| H A D | X86IntelInstPrinter.cpp | 76 const MCOperand &IndexReg = MI->getOperand(Op+X86::AddrIndexReg); in printMemReference() 94 printOperand(MI, Op+X86::AddrIndexReg, O); in printMemReference()
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| H A D | X86ATTInstPrinter.cpp | 114 const MCOperand &IndexReg = MI->getOperand(Op + X86::AddrIndexReg); in printMemReference() 138 printOperand(MI, Op + X86::AddrIndexReg, O); in printMemReference()
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86AsmParser.cpp | 2787 MRI->getEncodingValue(Inst.getOperand(3 + X86::AddrIndexReg).getReg()); in validateInstruction() 2819 MRI->getEncodingValue(Inst.getOperand(4 + X86::AddrIndexReg).getReg()); in validateInstruction()
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