Searched refs:AddSub (Results 1 – 7 of 7) sorted by relevance
| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 646 ARM_AM::AddrOpc AddSub = ARM_AM::add; in SelectLdStSOReg() local 648 AddSub = ARM_AM::sub; in SelectLdStSOReg() 751 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetReg() local 787 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImmPre() local 791 if (AddSub == ARM_AM::sub) Val *= -1; in SelectAddrMode2OffsetImmPre() 807 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImm() local 812 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, Val, in SelectAddrMode2OffsetImm() 863 ARM_AM::AddrOpc AddSub = ARM_AM::add; in SelectAddrMode3() local 865 AddSub = ARM_AM::sub; in SelectAddrMode3() 933 ARM_AM::AddrOpc AddSub = ARM_AM::add; in IsAddressingMode5() local [all …]
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| H A D | ARMLoadStoreOptimizer.cpp | 1425 ARM_AM::AddrOpc AddSub = Offset < 0 ? ARM_AM::sub : ARM_AM::add; in MergeBaseUpdateLoadStore() local 1448 int Imm = ARM_AM::getAM2Opc(AddSub, Bytes, ARM_AM::no_shift); in MergeBaseUpdateLoadStore() 1470 int Imm = ARM_AM::getAM2Opc(AddSub, Bytes, ARM_AM::no_shift); in MergeBaseUpdateLoadStore() 2162 ARM_AM::AddrOpc AddSub = ARM_AM::add; in CanFormLdStDWord() local 2164 AddSub = ARM_AM::sub; in CanFormLdStDWord() 2170 Offset = ARM_AM::getAM3Opc(AddSub, OffImm); in CanFormLdStDWord()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 2397 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode2Operands() local 2401 Val = ARM_AM::getAM2Opc(AddSub, Val, ARM_AM::no_shift); in addAddrMode2Operands() 2418 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAM2OffsetImmOperands() local 2422 Val = ARM_AM::getAM2Opc(AddSub, Val, ARM_AM::no_shift); in addAM2OffsetImmOperands() 2445 Val = ARM_AM::getAM3Opc(AddSub, Val); in addAddrMode3Operands() 2469 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAM3OffsetOperands() local 2473 Val = ARM_AM::getAM3Opc(AddSub, Val); in addAM3OffsetOperands() 2491 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode5Operands() local 2495 Val = ARM_AM::getAM5Opc(AddSub, Val); in addAddrMode5Operands() 2513 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode5FP16Operands() local [all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/AArch64/ |
| H A D | SVEInstrFormats.td | 165 def SVEAddSubImmOperand8 : SVEShiftedImmOperand<8, "AddSub", "isSVEAddSubImm<int8_t>">; 166 def SVEAddSubImmOperand16 : SVEShiftedImmOperand<16, "AddSub", "isSVEAddSubImm<int16_t>">; 167 def SVEAddSubImmOperand32 : SVEShiftedImmOperand<32, "AddSub", "isSVEAddSubImm<int32_t>">; 168 def SVEAddSubImmOperand64 : SVEShiftedImmOperand<64, "AddSub", "isSVEAddSubImm<int64_t>">;
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| H A D | AArch64InstrInfo.td | 961 defm ADD : AddSub<0, "add", "sub", add>; 962 defm SUB : AddSub<1, "sub", "add">;
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| H A D | AArch64InstrFormats.td | 2136 multiclass AddSub<bit isSub, string mnemonic, string alias,
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 8868 if (SDValue AddSub = lowerToAddSubOrFMAddSub(BV, Subtarget, DAG)) in LowerBUILD_VECTOR() local 8869 return AddSub; in LowerBUILD_VECTOR() 32275 if (SDValue AddSub = combineShuffleToAddSubOrFMAddSub(N, Subtarget, DAG)) in combineShuffle() local 32276 return AddSub; in combineShuffle()
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