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Searched refs:AddRHS (Results 1 – 5 of 5) sorted by relevance

/freebsd-12.1/contrib/llvm/include/llvm/IR/
H A DPatternMatch.h1454 Value *AddLHS, *AddRHS; in match() local
1455 auto AddExpr = m_Add(m_Value(AddLHS), m_Value(AddRHS)); in match()
1459 if (AddExpr.match(ICmpLHS) && (ICmpRHS == AddLHS || ICmpRHS == AddRHS)) in match()
1460 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpLHS); in match()
1464 if (AddExpr.match(ICmpRHS) && (ICmpLHS == AddLHS || ICmpLHS == AddRHS)) in match()
1465 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpRHS); in match()
/freebsd-12.1/contrib/llvm/lib/Transforms/InstCombine/
H A DInstructionCombining.cpp2512 ConstantInt *AddRHS; in visitSwitchInst() local
2513 if (match(Cond, m_Add(m_Value(Op0), m_ConstantInt(AddRHS)))) { in visitSwitchInst()
2516 Constant *NewCase = ConstantExpr::getSub(Case.getCaseValue(), AddRHS); in visitSwitchInst()
H A DInstCombineAndOrXor.cpp138 const APInt& AddRHS = OpRHS->getValue(); in OptAndOp() local
141 if ((AddRHS & (AndRHSV - 1)).isNullValue()) { in OptAndOp()
146 if ((AddRHS & AndRHSV).isNullValue()) { // Bit is not set, noop in OptAndOp()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp8448 SDValue AddRHS = RHS; in performAddCombine() local
8455 AddRHS = DAG.getZExtOrTrunc(AddRHS, SL, MVT::i64); in performAddCombine()
8456 return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, false); in performAddCombine()
8462 AddRHS = DAG.getSExtOrTrunc(AddRHS, SL, MVT::i64); in performAddCombine()
8463 return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, true); in performAddCombine()
/freebsd-12.1/contrib/llvm/lib/Analysis/
H A DScalarEvolution.cpp10055 const SCEVMulExpr *AddRHS = dyn_cast<SCEVMulExpr>(Add->getOperand(1)); in MatchNotExpr() local
10056 if (!AddRHS || AddRHS->getNumOperands() != 2 || in MatchNotExpr()
10057 !AddRHS->getOperand(0)->isAllOnesValue()) in MatchNotExpr()
10060 return AddRHS->getOperand(1); in MatchNotExpr()