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Searched refs:ASR (Results 1 – 25 of 27) sorted by relevance

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/freebsd-12.1/contrib/compiler-rt/lib/builtins/hexagon/
H A Dfastmath2_ldlib_asm.S90 lmanta = ASR(lmanta, expa)
91 lmantb = ASR(lmantb, expb)
189 lmanta = ASR(lmanta, expa)
190 lmantb = ASR(lmantb, expb)
H A Dfastmath2_dlib_asm.S97 lmanta = ASR(lmanta, expa)
98 lmantb = ASR(lmantb, expb)
198 lmanta = ASR(lmanta, expa)
199 lmantb = ASR(lmantb, expb)
H A Dfastmath_dlib_asm.S105 lmanta = ASR(lmanta, expa)
106 lmantb = ASR(lmantb, expb)
240 lmanta = ASR(lmanta, expa)
241 lmantb = ASR(lmantb, expb)
H A Ddfdiv.S170 DIV_ITER1B(ASR,1,15,)
171 DIV_ITER1B(ASR,16,15,)
172 DIV_ITER1B(ASR,31,15,PROD=# ( 0 );)
H A Ddfaddsub.S118 BTMP = ASR(BTMP,EXPDIFF)
/freebsd-12.1/tools/kerneldoc/subsys/
H A DDoxyfile-dev_asr8 PROJECT_NAME = "FreeBSD kernel ASR device code"
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AddressingModes.h37 ASR, enumerator
58 case AArch64_AM::ASR: return "asr"; in getShiftExtendName()
79 case 2: return AArch64_AM::ASR; in getShiftType()
107 case AArch64_AM::ASR: STEnc = 2; break; in getShifterImm()
/freebsd-12.1/contrib/llvm/lib/Target/AVR/
H A DAVRISelLowering.h41 ASR, ///< Arithmetic shift right. enumerator
H A DAVRISelLowering.cpp260 NODE(ASR); in getTargetNodeName()
315 Opc8 = AVRISD::ASR; in LowerShifts()
H A DAVRInstrInfo.td62 def AVRasr : SDNode<"AVRISD::ASR", SDTIntUnaryOp>;
/freebsd-12.1/contrib/llvm/tools/lldb/source/Plugins/Process/Utility/
H A DARMUtils.h156 static inline uint32_t ASR(const uint32_t value, const uint32_t amount, in ASR() function
/freebsd-12.1/contrib/llvm/lib/Transforms/Utils/
H A DFunctionComparator.cpp664 unsigned int ASR = GEPR->getPointerAddressSpace(); in cmpGEPs() local
666 if (int Res = cmpNumbers(ASL, ASR)) in cmpGEPs()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h405 ASR, enumerator
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64SchedPredicates.td51 def CheckShiftASR : CheckImmOperand_s<3, "AArch64_AM::ASR">;
H A DAArch64FastISel.cpp1251 case Instruction::AShr: ShiftType = AArch64_AM::ASR; break; in emitAddSub()
3718 AArch64_AM::ASR, 31, /*WantResult=*/false); in fastLowerIntrinsicCall()
3728 AArch64_AM::ASR, 63, /*WantResult=*/false); in fastLowerIntrinsicCall()
4925 SelectReg, /*IsKill=*/true, AArch64_AM::ASR, Lg2); in selectSDiv()
H A DAArch64InstrInfo.cpp801 (AArch64_AM::getShiftType(Imm) == AArch64_AM::ASR && ShiftVal == 31); in isFalkorShiftExtFast()
809 (AArch64_AM::getShiftType(Imm) == AArch64_AM::ASR && ShiftVal == 63); in isFalkorShiftExtFast()
H A DAArch64ISelDAGToDAG.cpp334 return AArch64_AM::ASR; in getShiftTypeForNode()
/freebsd-12.1/contrib/llvm/lib/Target/Sparc/
H A DSparcRegisterInfo.td362 (add Y, (sequence "ASR%u", 1, 31))>;
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp1223 ST == AArch64_AM::ASR || ST == AArch64_AM::ROR || in isShifter()
1315 ST == AArch64_AM::ASR) && getShiftExtendAmount() < width; in isArithmeticShifter()
1326 ST == AArch64_AM::ASR || ST == AArch64_AM::ROR) && in isLogicalShifter()
2752 .Case("asr", AArch64_AM::ASR) in tryParseOptionalShiftExtend()
2775 ShOp == AArch64_AM::ASR || ShOp == AArch64_AM::ROR || in tryParseOptionalShiftExtend()
/freebsd-12.1/share/misc/
H A Dpci_vendors30414 9005 0296 ASR-2240S
30416 9005 0298 ASR-4000
30445 9005 02d4 ASR-2045
30446 9005 02d5 ASR-2405
30447 9005 02d6 ASR-2445
30448 9005 02d7 ASR-2805
30456 9005 02df ASR-2045G
30457 9005 02e0 ASR-2405G
30458 9005 02e1 ASR-2445G
30459 9005 02e2 ASR-2805G
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/ARM/
H A DARMInstrThumb.td1035 // ASR immediate
1046 // ASR register
H A DARMScheduleSwift.td155 // ASR,LSL,ROR,RRX
H A DARMScheduleA57.td228 // (ASR, LSL, LSR, ROR, RRX)=MOVsi, MVN
/freebsd-12.1/contrib/llvm/lib/Target/ARC/
H A DARCInstrInfo.td235 defm ASR : ArcBinaryEXT5Inst<0b000010, "asr">;
/freebsd-12.1/contrib/binutils/gas/po/
H A Dgas.pot1769 msgid "'LSL' or 'ASR' required"
1777 msgid "'ASR' required"

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