Searched refs:ANDReg (Results 1 – 1 of 1) sorted by relevance
1870 unsigned ANDReg = emitAnd_ri(MVT::i32, ResultReg, /*IsKill=*/true, 1); in emitLoad() local1871 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitLoad()1872 ResultReg = ANDReg; in emitLoad()2132 unsigned ANDReg = emitAnd_ri(MVT::i32, SrcReg, /*TODO:IsKill=*/false, 1); in emitStore() local2133 assert(ANDReg && "Unexpected AND instruction emission failure."); in emitStore()2134 SrcReg = ANDReg; in emitStore()