| /f-stack/dpdk/examples/qos_sched/ |
| H A D | init.c | 44 .wthresh = RX_WTHRESH,
50 .wthresh = TX_WTHRESH,
87 rx_conf.rx_thresh.wthresh = rx_thresh.wthresh; in app_init_port()
94 tx_conf.tx_thresh.wthresh = tx_thresh.wthresh; in app_init_port()
436 rx_thresh.pthresh, rx_thresh.hthresh, rx_thresh.wthresh, in app_init()
437 tx_thresh.pthresh, tx_thresh.hthresh, tx_thresh.wthresh); in app_init()
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| H A D | args.c | 188 rx_thresh.wthresh = (uint8_t)vals[2]; in app_parse_rth_conf()
205 tx_thresh.wthresh = (uint8_t)vals[2]; in app_parse_tth_conf()
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| H A D | main.h | 135 uint8_t wthresh; /**< Ring writeback threshold. */ member
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| /f-stack/dpdk/lib/librte_ethdev/ |
| H A D | rte_ethdev_trace.h | 50 rte_trace_point_emit_u8(rx_conf->rx_thresh.wthresh);
66 rte_trace_point_emit_u8(tx_conf->tx_thresh.wthresh);
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| /f-stack/dpdk/app/test-pipeline/ |
| H A D | init.c | 90 .wthresh = 4,
100 .wthresh = 0,
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| /f-stack/dpdk/drivers/net/bnxt/ |
| H A D | bnxt_txq.h | 21 uint8_t wthresh; /* Write-back threshold reg */ member
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| /f-stack/dpdk/drivers/net/e1000/ |
| H A D | igb_rxtx.c | 1551 txq->wthresh = tx_conf->tx_thresh.wthresh; in eth_igb_tx_queue_setup()
1552 if (txq->wthresh > 0 && hw->mac.type == e1000_82576) in eth_igb_tx_queue_setup()
1553 txq->wthresh = 1; in eth_igb_tx_queue_setup()
1722 rxq->wthresh = rx_conf->rx_thresh.wthresh; in eth_igb_rx_queue_setup()
1723 if (rxq->wthresh > 0 && in eth_igb_rx_queue_setup()
1725 rxq->wthresh = 1; in eth_igb_rx_queue_setup()
2454 rxdctl |= ((rxq->wthresh & 0x1F) << 16); in eth_igb_rx_init()
2617 txdctl |= ((txq->wthresh & 0x1F) << 16); in eth_igb_tx_init()
2754 rxdctl |= ((rxq->wthresh & 0x1F) << 16); in eth_igbvf_rx_init()
2824 txdctl |= ((txq->wthresh & 0x1F) << 16); in eth_igbvf_tx_init()
[all …]
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| H A D | em_rxtx.c | 105 uint8_t wthresh; /**< Write-back threshold register. */ member
172 uint8_t wthresh; /**< Write-back threshold register. */ member
1259 if (tx_conf->tx_thresh.wthresh != 0 && tx_rs_thresh != 1) { in eth_em_tx_queue_setup()
1302 txq->wthresh = tx_conf->tx_thresh.wthresh; in eth_em_tx_queue_setup()
1467 rxq->wthresh = rx_conf->rx_thresh.wthresh; in eth_em_rx_queue_setup()
1829 rxdctl |= (rxq->wthresh & 0x3F) << 16; in eth_em_rx_init()
1964 txdctl |= (txq->wthresh & 0x3F) << 16; in eth_em_tx_init()
2022 qinfo->conf.tx_thresh.wthresh = txq->wthresh; in em_txq_info_get()
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| /f-stack/dpdk/drivers/net/igc/ |
| H A D | igc_txrx.c | 125 uint8_t wthresh; /**< Write-back threshold register. */ member
205 uint8_t wthresh; /**< Write-back threshold register. */ member
1193 rxdctl |= ((uint32_t)rxq->wthresh << IGC_RXDCTL_WTHRESH_SHIFT) & in igc_rx_init()
1370 rxq->wthresh = rx_conf->rx_thresh.wthresh; in eth_igc_rx_queue_setup()
1992 if (tx_conf->tx_thresh.wthresh == 0) in eth_igc_tx_queue_setup()
2024 txq->wthresh = tx_conf->tx_thresh.wthresh; in eth_igc_tx_queue_setup()
2199 txdctl |= ((uint32_t)txq->wthresh << IGC_TXDCTL_WTHRESH_SHIFT) & in igc_tx_init()
2234 qinfo->conf.rx_thresh.wthresh = rxq->wthresh; in eth_igc_rxq_info_get()
2249 qinfo->conf.tx_thresh.wthresh = txq->wthresh; in eth_igc_txq_info_get()
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| /f-stack/dpdk/doc/guides/nics/ |
| H A D | szedata2.rst | 142 RX threshold registers: pthresh=0 hthresh=0 wthresh=0
144 TX threshold registers: pthresh=0 hthresh=0 wthresh=0
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| H A D | nfb.rst | 145 RX threshold registers: pthresh=0 hthresh=0 wthresh=0
147 TX threshold registers: pthresh=0 hthresh=0 wthresh=0
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| H A D | softnic.rst | 176 RX threshold registers: pthresh=8 hthresh=8 wthresh=0
180 TX threshold registers: pthresh=32 hthresh=0 wthresh=0
186 RX threshold registers: pthresh=0 hthresh=0 wthresh=0
190 TX threshold registers: pthresh=0 hthresh=0 wthresh=0
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| H A D | octeontx2.rst | 96 RX threshold registers: pthresh=0 hthresh=0 wthresh=0
100 TX threshold registers: pthresh=0 hthresh=0 wthresh=0
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| H A D | pcap_ring.rst | 242 RX threshold registers: pthresh=8 hthresh=8 wthresh=4
244 TX threshold registers: pthresh=36 hthresh=0 wthresh=0
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| /f-stack/dpdk/drivers/net/ixgbe/ |
| H A D | ixgbe_rxtx.h | 226 uint8_t wthresh; /**< Write-back threshold reg. */ member
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| H A D | ixgbe_rxtx.c | 982 if (m->nb_segs > IXGBE_TX_MAX_SEG - txq->wthresh) { in ixgbe_prep_pkts()
2685 if ((tx_rs_thresh > 1) && (tx_conf->tx_thresh.wthresh != 0)) { in ixgbe_dev_tx_queue_setup()
2723 txq->wthresh = tx_conf->tx_thresh.wthresh; in ixgbe_dev_tx_queue_setup()
5310 txdctl |= ((txq->wthresh & 0x7F) << 16); in ixgbe_dev_rxtx_start()
5584 qinfo->conf.tx_thresh.wthresh = txq->wthresh; in ixgbe_txq_info_get()
5780 txdctl |= ((txq->wthresh & 0x7F) << 16); in ixgbevf_dev_rxtx_start()
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| /f-stack/dpdk/app/test/ |
| H A D | test_kni.c | 60 .wthresh = 4,
69 .wthresh = 0,
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| H A D | test_pmd_perf.c | 79 .wthresh = RX_WTHRESH,
88 .wthresh = TX_WTHRESH,
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| /f-stack/dpdk/drivers/net/i40e/ |
| H A D | i40e_vf_representor.c | 71 .wthresh = I40E_DEFAULT_RX_WTHRESH, in i40e_vf_representor_dev_infos_get()
82 .wthresh = I40E_DEFAULT_TX_WTHRESH, in i40e_vf_representor_dev_infos_get()
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| /f-stack/dpdk/drivers/net/ice/ |
| H A D | ice_rxtx.h | 123 uint8_t wthresh; /**< Write-back threshold reg. */ member
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| H A D | ice_dcf_ethdev.c | 678 .wthresh = ICE_DEFAULT_RX_WTHRESH, in ice_dcf_dev_info_get()
689 .wthresh = ICE_DEFAULT_TX_WTHRESH, in ice_dcf_dev_info_get()
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| /f-stack/dpdk/drivers/net/txgbe/ |
| H A D | txgbe_rxtx.h | 384 uint8_t wthresh; /**< Write-back threshold reg. */ member
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| /f-stack/dpdk/drivers/net/bonding/ |
| H A D | rte_eth_bond_api.c | 305 rxconf_i->rx_thresh.wthresh = 0; in eth_bond_slave_inherit_dev_info_rx_first()
333 txconf_i->tx_thresh.wthresh = 0; in eth_bond_slave_inherit_dev_info_tx_first()
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| /f-stack/dpdk/doc/guides/sample_app_ug/ |
| H A D | link_status_intr.rst | 235 .wthresh = RX_WTHRESH,
263 .wthresh = TX_WTHRESH,
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| /f-stack/dpdk/drivers/net/octeontx2/ |
| H A D | otx2_ethdev_ops.c | 218 qinfo->conf.tx_thresh.wthresh = 0; in otx2_nix_txq_info_get()
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