Searched refs:udma_regs (Results 1 – 6 of 6) sorted by relevance
142 &udma->udma_regs->m2s.axi_m2s.comp_wr_cfg_1, in al_udma_m2s_axi_set()143 &udma->udma_regs->m2s.axi_m2s.comp_wr_cfg_2, in al_udma_m2s_axi_set()144 &udma->udma_regs->m2s.axi_m2s.desc_wr_cfg_1); in al_udma_m2s_axi_set()147 &udma->udma_regs->m2s.axi_m2s.data_rd_cfg_1, in al_udma_m2s_axi_set()148 &udma->udma_regs->m2s.axi_m2s.data_rd_cfg_2, in al_udma_m2s_axi_set()149 &udma->udma_regs->m2s.axi_m2s.data_rd_cfg); in al_udma_m2s_axi_set()152 &udma->udma_regs->m2s.axi_m2s.desc_rd_cfg_1, in al_udma_m2s_axi_set()153 &udma->udma_regs->m2s.axi_m2s.desc_rd_cfg_2, in al_udma_m2s_axi_set()241 &udma->udma_regs->s2m.axi_s2m.data_wr_cfg); in al_udma_s2m_axi_set()695 &udma->udma_regs->m2s.m2s_rate_limiter.gen_cfg); in al_udma_m2s_rlimit_set()[all …]
77 (struct unit_regs*)udma->udma_regs; in al_udma_set_defaults()95 &udma->udma_regs->s2m.s2m_comp.cfg_application_ack, 0); in al_udma_set_defaults()157 &udma_q->udma->udma_regs->s2m.s2m_comp.cfg_1c); in al_udma_q_config_compl()162 al_reg_write32(&udma_q->udma->udma_regs->s2m.s2m_comp.cfg_1c in al_udma_q_config_compl()249 udma->udma_regs = (union udma_regs *)&udma_params->udma_regs_base->m2s; in al_udma_init()251 udma->udma_regs = (union udma_regs *)&udma_params->udma_regs_base->s2m; in al_udma_init()267 udma->udma_regs); in al_udma_init()312 &udma->udma_regs->m2s.m2s_q[qid]; in al_udma_q_init()315 &udma->udma_regs->s2m.s2m_q[qid]; in al_udma_q_init()508 state_reg = al_reg_read32(&udma->udma_regs->m2s.m2s.state); in al_udma_state_get()[all …]
62 &(UDMA->udma_regs->TYPE.GROUP.REG)))67 &(UDMA->udma_regs->TYPE.GROUP.REG)) \73 &(UDMA->udma_regs->TYPE.GROUP.REG)) \
61 union udma_regs { union
306 union udma_regs __iomem *udma_regs; /* pointer to the UDMA registers */ member
209 al_reg_write32(&udma->udma_regs->m2s.m2s.indirect_ctrl, qid); in al_udma_regs_m2s_q_print()326 al_reg_write32(&udma->udma_regs->m2s.m2s.indirect_ctrl, qid); in al_udma_regs_s2m_q_print()