1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2015-2020 3 */ 4 5 #ifndef _TXGBE_DCB_H_ 6 #define _TXGBE_DCB_H_ 7 8 #include "txgbe_type.h" 9 10 /* DCB defines */ 11 /* DCB credit calculation defines */ 12 #define TXGBE_DCB_CREDIT_QUANTUM 64 13 #define TXGBE_DCB_MAX_CREDIT_REFILL 200 /* 200 * 64B = 12800B */ 14 #define TXGBE_DCB_MAX_TSO_SIZE (32 * 1024) /* Max TSO pkt size in DCB*/ 15 #define TXGBE_DCB_MAX_CREDIT (2 * TXGBE_DCB_MAX_CREDIT_REFILL) 16 17 /* 513 for 32KB TSO packet */ 18 #define TXGBE_DCB_MIN_TSO_CREDIT \ 19 ((TXGBE_DCB_MAX_TSO_SIZE / TXGBE_DCB_CREDIT_QUANTUM) + 1) 20 21 #define TXGBE_DCB_TX_CONFIG 0 22 #define TXGBE_DCB_RX_CONFIG 1 23 24 struct txgbe_dcb_support { 25 u32 capabilities; /* DCB capabilities */ 26 27 /* Each bit represents a number of TCs configurable in the hw. 28 * If 8 traffic classes can be configured, the value is 0x80. 29 */ 30 u8 traffic_classes; 31 u8 pfc_traffic_classes; 32 }; 33 34 enum txgbe_dcb_tsa { 35 txgbe_dcb_tsa_ets = 0, 36 txgbe_dcb_tsa_group_strict_cee, 37 txgbe_dcb_tsa_strict 38 }; 39 40 /* Traffic class bandwidth allocation per direction */ 41 struct txgbe_dcb_tc_path { 42 u8 bwg_id; /* Bandwidth Group (BWG) ID */ 43 u8 bwg_percent; /* % of BWG's bandwidth */ 44 u8 link_percent; /* % of link bandwidth */ 45 u8 up_to_tc_bitmap; /* User Priority to Traffic Class mapping */ 46 u16 data_credits_refill; /* Credit refill amount in 64B granularity */ 47 u16 data_credits_max; /* Max credits for a configured packet buffer 48 * in 64B granularity. 49 */ 50 enum txgbe_dcb_tsa tsa; /* Link or Group Strict Priority */ 51 }; 52 53 enum txgbe_dcb_pfc { 54 txgbe_dcb_pfc_disabled = 0, 55 txgbe_dcb_pfc_enabled, 56 txgbe_dcb_pfc_enabled_txonly, 57 txgbe_dcb_pfc_enabled_rxonly 58 }; 59 60 /* Traffic class configuration */ 61 struct txgbe_dcb_tc_config { 62 struct txgbe_dcb_tc_path path[2]; /* One each for Tx/Rx */ 63 enum txgbe_dcb_pfc pfc; /* Class based flow control setting */ 64 65 u16 desc_credits_max; /* For Tx Descriptor arbitration */ 66 u8 tc; /* Traffic class (TC) */ 67 }; 68 69 enum txgbe_dcb_pba { 70 /* PBA[0-7] each use 64KB FIFO */ 71 txgbe_dcb_pba_equal = PBA_STRATEGY_EQUAL, 72 /* PBA[0-3] each use 80KB, PBA[4-7] each use 48KB */ 73 txgbe_dcb_pba_80_48 = PBA_STRATEGY_WEIGHTED 74 }; 75 76 struct txgbe_dcb_num_tcs { 77 u8 pg_tcs; 78 u8 pfc_tcs; 79 }; 80 81 struct txgbe_dcb_config { 82 struct txgbe_dcb_tc_config tc_config[TXGBE_DCB_TC_MAX]; 83 struct txgbe_dcb_support support; 84 struct txgbe_dcb_num_tcs num_tcs; 85 u8 bw_percentage[TXGBE_DCB_BWG_MAX][2]; /* One each for Tx/Rx */ 86 bool pfc_mode_enable; 87 bool round_robin_enable; 88 89 enum txgbe_dcb_pba rx_pba_cfg; 90 91 u32 link_speed; /* For bandwidth allocation validation purpose */ 92 bool vt_mode; 93 }; 94 95 int txgbe_dcb_pfc_enable(struct txgbe_hw *hw, u8 tc_num); 96 97 /* DCB credits calculation */ 98 s32 txgbe_dcb_calculate_tc_credits_cee(struct txgbe_hw *hw, 99 struct txgbe_dcb_config *dcb_config, 100 u32 max_frame_size, u8 direction); 101 102 /* DCB PFC */ 103 s32 txgbe_dcb_config_pfc(struct txgbe_hw *hw, u8 pfc_en, u8 *map); 104 105 /* DCB unpack routines */ 106 void txgbe_dcb_unpack_pfc_cee(struct txgbe_dcb_config *cfg, 107 u8 *map, u8 *pfc_up); 108 void txgbe_dcb_unpack_refill_cee(struct txgbe_dcb_config *cfg, int direction, 109 u16 *refill); 110 void txgbe_dcb_unpack_max_cee(struct txgbe_dcb_config *cfg, u16 *max); 111 void txgbe_dcb_unpack_bwgid_cee(struct txgbe_dcb_config *cfg, int direction, 112 u8 *bwgid); 113 void txgbe_dcb_unpack_tsa_cee(struct txgbe_dcb_config *cfg, int direction, 114 u8 *tsa); 115 void txgbe_dcb_unpack_map_cee(struct txgbe_dcb_config *cfg, int direction, 116 u8 *map); 117 u8 txgbe_dcb_get_tc_from_up(struct txgbe_dcb_config *cfg, int direction, u8 up); 118 119 #include "txgbe_dcb_hw.h" 120 121 #endif /* _TXGBE_DCB_H_ */ 122