| /f-stack/freebsd/contrib/device-tree/Bindings/mmc/ |
| H A D | fsl-imx-esdhc.txt | 39 - fsl,tuning-start-tap: Specify the start dealy cell point when send first CMD19
40 in tuning procedure.
41 - fsl,tuning-step: Specify the increasing delay cell steps in tuning procedure.
42 The uSDHC use one delay cell as default increasing step to do tuning process.
43 This property allows user to change the tuning step to more than one delay
45 tuning step can't find the proper delay window within limited tuning retries.
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| H A D | fsl-imx-esdhc.yaml | 76 fsl,tuning-start-tap:
79 Specify the start delay cell point when send first CMD19 in tuning procedure.
82 fsl,tuning-step:
85 Specify the increasing delay cell steps in tuning procedure.
86 The uSDHC use one delay cell as default increasing step to do tuning process.
87 This property allows user to change the tuning step to more than one delay
89 tuning step can't find the proper delay window within limited tuning retries.
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| H A D | rockchip-dw-mshc.yaml | 75 to control the clock phases, "ciu-sample" is required for tuning
85 low speeds or in case where all phases work at tuning time.
94 The desired number of times that the host execute tuning when needed.
95 If not specified, the host will do tuning for 360 times,
96 namely tuning for each degree.
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| H A D | sdhci-omap.txt | 5 …tuning, the device tree should have a "cpu_thermal" node which maps to the appropriate thermal zon…
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| H A D | marvell,xenon-sdhci.txt | 72 used to identify a valid sampling window, in tuning process.
88 Xenon SDHC SoC usually doesn't provide re-tuning counter in
90 This property provides the re-tuning counter.
91 If this property is not set, default re-tuning counter will
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| H A D | sdhci-pxa.yaml | 66 description: Specify a number of cycles to delay for tuning.
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| H A D | mmci.txt | 32 block is present and used for tuning.
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| /f-stack/freebsd/contrib/device-tree/Bindings/iio/proximity/ |
| H A D | as3935.txt | 15 - ams,tuning-capacitor-pf: Calibration tuning capacitor stepping
32 ams,tuning-capacitor-pf = <80>;
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| /f-stack/freebsd/contrib/device-tree/Bindings/phy/ |
| H A D | qcom,qusb2-phy.yaml | 68 tuning parameter value for qusb2 phy.
86 tuning parameter that may vary for different boards of same SOC.
95 tuning parameter that may vary for different boards of same SOC.
104 tuning parameter that may vary for different boards of same SOC.
112 It is a 4 bit value that specifies tuning for HSTX
144 It is a 2 bit value tuning parameter that control disconnect
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| H A D | apm-xgene-phy.txt | 17 - apm,tx-eye-tuning : Manual control to fine tune the capture of the serial
22 - apm,tx-eye-direction : Eye tuning manual control direction. 0 means sample
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| /f-stack/freebsd/contrib/device-tree/Bindings/net/ |
| H A D | smsc-lan87xx.txt | 3 Some boards require special tuning values. Configure them
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| /f-stack/freebsd/contrib/device-tree/Bindings/net/ieee802154/ |
| H A D | at86rf230.txt | 15 - xtal-trim: u8 value for fine tuning the internal capacitance
|
| /f-stack/app/redis-5.0.5/deps/jemalloc/ |
| H A D | TUNING.md | 1 This document summarizes the common approaches for performance fine tuning with
11 ## Notable runtime options for performance tuning
14 [malloc_conf](http://jemalloc.net/jemalloc.3.html#tuning).
|
| H A D | README | 6 such as heap profiling and extensive monitoring/tuning hooks. Modern jemalloc
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| /f-stack/freebsd/contrib/device-tree/src/arm/ |
| H A D | imx7ulp.dtsi | 227 fsl,tuning-start-tap = <20>;
228 fsl,tuning-step = <2>;
241 fsl,tuning-start-tap = <20>;
242 fsl,tuning-step = <2>;
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| H A D | imx6sll.dtsi | 720 fsl,tuning-step = <2>;
721 fsl,tuning-start-tap = <20>;
734 fsl,tuning-step = <2>;
735 fsl,tuning-start-tap = <20>;
748 fsl,tuning-step = <2>;
749 fsl,tuning-start-tap = <20>;
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| H A D | imx7d-pico.dtsi | 354 tuning-step = <2>;
383 fsl,tuning-step = <2>;
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| H A D | imx7d-nitrogen7.dts | 373 fsl,tuning-step = <2>;
407 fsl,tuning-step = <2>;
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| H A D | imx6ul.dtsi | 897 fsl,tuning-step = <2>;
898 fsl,tuning-start-tap = <20>;
912 fsl,tuning-step = <2>;
913 fsl,tuning-start-tap = <20>;
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| /f-stack/freebsd/contrib/device-tree/src/arm64/freescale/ |
| H A D | imx8mp.dtsi | 666 fsl,tuning-start-tap = <20>;
667 fsl,tuning-step= <2>;
680 fsl,tuning-start-tap = <20>;
681 fsl,tuning-step= <2>;
694 fsl,tuning-start-tap = <20>;
695 fsl,tuning-step= <2>;
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| H A D | imx8mn.dtsi | 694 fsl,tuning-start-tap = <20>;
695 fsl,tuning-step= <2>;
708 fsl,tuning-start-tap = <20>;
709 fsl,tuning-step= <2>;
722 fsl,tuning-start-tap = <20>;
723 fsl,tuning-step= <2>;
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| H A D | imx8mm.dtsi | 794 fsl,tuning-start-tap = <20>;
795 fsl,tuning-step= <2>;
808 fsl,tuning-start-tap = <20>;
809 fsl,tuning-step= <2>;
822 fsl,tuning-start-tap = <20>;
823 fsl,tuning-step= <2>;
|
| /f-stack/freebsd/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | baikal,bt1-l2-ctl.yaml | 17 L2-cache controller block is responsible for the tuning. Its DT node is
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| /f-stack/dpdk/doc/guides/howto/ |
| H A D | pvp_reference_benchmark.rst | 42 Host tuning
274 Guest tuning
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| /f-stack/freebsd/contrib/octeon-sdk/ |
| H A D | cvmx-usbnx-defs.h | 1846 uint64_t tuning : 4; /**< Transmitter Tuning for High-Speed Operation. member
1910 uint64_t tuning : 4;
1978 uint64_t tuning : 4; /**< Transmitter Tuning for High-Speed Operation. member
2042 uint64_t tuning : 4;
|