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Searched refs:t4_read_reg (Results 1 – 6 of 6) sorted by relevance

/f-stack/dpdk/drivers/net/cxgbe/base/
H A Dt4_hw.c46 v = t4_read_reg(adap, A_TP_MTU_TABLE); in t4_read_mtu_tbl()
136 u32 val = t4_read_reg(adapter, reg); in t4_wait_op_done_val()
187 *vals++ = t4_read_reg(adap, data_reg); in t4_read_indirect()
236 pcie_fw = t4_read_reg(adap, A_PCIE_FW); in t4_report_fw_error()
403 ctl = t4_read_reg(adap, ctl_reg); in t4_wr_mbox_meat_timeout()
469 pcie_fw = t4_read_reg(adap, A_PCIE_FW); in t4_wr_mbox_meat_timeout()
481 v = t4_read_reg(adap, ctl_reg); in t4_wr_mbox_meat_timeout()
1953 *bufp++ = t4_read_reg(adap, reg); in t4_get_regs()
5558 mem_reg = t4_read_reg(adap, in t4_memory_rw_addr()
5579 t4_read_reg(adap, in t4_memory_rw_addr()
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H A Dt4vf_hw.c26 val = t4_read_reg(adapter, whoami); in t4vf_wait_dev_ready()
31 val = t4_read_reg(adapter, whoami); in t4vf_wait_dev_ready()
158 v = G_MBOWNER(t4_read_reg(adapter, mbox_ctl)); in t4vf_wr_mbox_core()
160 v = G_MBOWNER(t4_read_reg(adapter, mbox_ctl)); in t4vf_wr_mbox_core()
176 t4_read_reg(adapter, mbox_data); /* flush write */ in t4vf_wr_mbox_core()
179 t4_read_reg(adapter, mbox_ctl); /* flush write */ in t4vf_wr_mbox_core()
199 v = t4_read_reg(adapter, mbox_ctl); in t4vf_wr_mbox_core()
248 dev_err(adapter, " Control = %#x\n", t4_read_reg(adapter, mbox_ctl)); in t4vf_wr_mbox_core()
298 pl_vf_rev = G_REV(t4_read_reg(adapter, A_PL_VF_REV)); in t4vf_prep_adapter()
507 whoami = t4_read_reg(adapter, T4VF_PL_BASE_ADDR + A_PL_VF_WHOAMI); in t4vf_get_pf_from_vf()
H A Dadapter.h475 static inline u32 t4_read_reg(struct adapter *adapter, u32 reg_addr) in t4_read_reg() function
/f-stack/dpdk/drivers/net/cxgbe/
H A Dsge.c2349 if ((t4_read_reg(adap, A_SGE_CONTROL) & F_RXPKTCPLMODE) != in t4_sge_init_soft()
2364 t4_read_reg(adap, A_SGE_FL_BUFFER_SIZE0 + (x) * sizeof(u32)) in t4_sge_init_soft()
2414 timer_value_0_and_1 = t4_read_reg(adap, A_SGE_TIMER_VALUE_0_AND_1); in t4_sge_init_soft()
2415 timer_value_2_and_3 = t4_read_reg(adap, A_SGE_TIMER_VALUE_2_AND_3); in t4_sge_init_soft()
2416 timer_value_4_and_5 = t4_read_reg(adap, A_SGE_TIMER_VALUE_4_AND_5); in t4_sge_init_soft()
2430 ingress_rx_threshold = t4_read_reg(adap, A_SGE_INGRESS_RX_THRESHOLD); in t4_sge_init_soft()
2449 sge_control = t4_read_reg(adap, A_SGE_CONTROL); in t4_sge_init()
2472 sge_conm_ctrl = t4_read_reg(adap, A_SGE_CONM_CTRL); in t4_sge_init()
H A Dcxgbe_main.c667 t4_read_reg(adap, in setup_memwin()
2031 whoami = t4_read_reg(adapter, A_PL_WHOAMI); in cxgbe_probe()
2073 qpp = 1 << ((t4_read_reg(adapter, in cxgbe_probe()
2201 if (t4_read_reg(adapter, A_LE_DB_CONFIG) & F_HASHEN) { in cxgbe_probe()
2205 hash_base = t4_read_reg(adapter, hash_reg); in cxgbe_probe()
H A Dcxgbe_filter.c27 val = t4_read_reg(adap, A_LE_DB_RSP_CODE_0); in cxgbe_init_hash_filter()
33 val = t4_read_reg(adap, A_LE_DB_RSP_CODE_1); in cxgbe_init_hash_filter()
1314 tcb_base = t4_read_reg(adapter, A_TP_CMM_TCB_BASE); in cxgbe_get_filter_count()