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/f-stack/freebsd/contrib/device-tree/Bindings/arm/
H A Didle-states.yaml7 title: ARM idle states binding description
33 The power states described in the SBSA document define the basic CPU states on
47 2 - idle-states definitions
163 states energy consumptions plots.
206 shallower states in a system with multiple idle states) is defined
208 IDLE1 and IDLE2 states breaks even.
214 3 - idle-states node
217 ARM processor idle states are defined within the idle-states node, which is
246 const: idle-states
479 idle-states {
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H A Dpsci.yaml103 [1] Kernel documentation - ARM idle states bindings
104 Documentation/devicetree/bindings/arm/idle-states.yaml
115 own specific power states and can be better represented hierarchically.
117 For these cases, the definitions of the idle states for the CPUs and the
118 CPU topology, must conform to the binding in [3]. The idle states
192 // Case 4: CPUs and CPU idle states described using the hierarchical model.
216 idle-states {
227 domain-idle-states {
253 domain-idle-states = <&CPU_PWRDN>;
259 domain-idle-states = <&CPU_PWRDN>;
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H A Dcpu-capacity.txt98 idle-states {
127 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
138 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
149 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
160 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
171 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
182 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
/f-stack/freebsd/kern/
H A Dsubr_prng.c41 pcg32u_random_t states[2]; member
47 pcg32u_srandom_r(&state64->states[0], seed); in pcg64u_srandom_r()
48 pcg32u_srandom_r(&state64->states[1], seed); in pcg64u_srandom_r()
54 return ((((uint64_t)pcg32u_random_r(&state64->states[0])) << 32) | in pcg64u_random_r()
55 pcg32u_random_r(&state64->states[1])); in pcg64u_random_r()
/f-stack/freebsd/contrib/device-tree/Bindings/powerpc/opal/
H A Dpower-mgt.txt5 idle states. The description of these idle states is exposed via the
14 - flags: indicating some aspects of this idle states such as the
16 idle states and so on. The flag bits are as follows:
32 If idle-states are defined, then the properties
38 Array of strings containing the names of the idle states.
42 flags associated with the the aforementioned idle-states. The
62 exit-latencies (in ns) for the idle states in
67 target-residency (in ns) for the idle states in
75 PSSCR for each of the idle states in ibm,cpu-idle-state-names.
88 kernel. For such idle states, the kernel would set the
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/f-stack/freebsd/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls2080a.dtsi20 cpu-idle-states = <&CPU_PW20>;
30 cpu-idle-states = <&CPU_PW20>;
40 cpu-idle-states = <&CPU_PW20>;
50 cpu-idle-states = <&CPU_PW20>;
60 cpu-idle-states = <&CPU_PW20>;
70 cpu-idle-states = <&CPU_PW20>;
81 cpu-idle-states = <&CPU_PW20>;
90 cpu-idle-states = <&CPU_PW20>;
H A Dfsl-ls2088a.dtsi20 cpu-idle-states = <&CPU_PW20>;
30 cpu-idle-states = <&CPU_PW20>;
40 cpu-idle-states = <&CPU_PW20>;
50 cpu-idle-states = <&CPU_PW20>;
61 cpu-idle-states = <&CPU_PW20>;
70 cpu-idle-states = <&CPU_PW20>;
80 cpu-idle-states = <&CPU_PW20>;
90 cpu-idle-states = <&CPU_PW20>;
/f-stack/freebsd/contrib/device-tree/Bindings/regulator/
H A Dgpio-regulator.yaml35 voltage/current listed in "states".
39 gpios-states:
55 states:
58 no states in the "states" array, use a fixed regulator instead.
92 - states
107 states = <1800000 0x3>,
H A Drohm,bd71828-regulator.yaml83 # Supported default DVS states:
91 #(*) LPSR and SUSPEND states use same voltage but both states have own
96 #(**) All states use same voltage but have own enable / disable
/f-stack/freebsd/contrib/device-tree/Bindings/power/
H A Dpower-domain.yaml30 domain-idle-states:
33 Phandles of idle states that defines the available states for the
37 Note that, the domain-idle-state property reflects the idle states of this
38 PM domain and not the idle states of the devices or sub-domains in the PM
39 domain. Devices and sub-domains have their own idle states independent of
40 the parent domain's idle states. In the absence of this property, the
106 domain-idle-states = <&DOMAIN_RET>, <&DOMAIN_PWR_DN>;
114 domain-idle-states = <&DOMAIN_PWR_DN>;
117 domain-idle-states {
/f-stack/freebsd/contrib/device-tree/Bindings/thermal/
H A Dthermal-cooling-devices.yaml30 scaling (DVFS), and uses lower frequencies as cooling states.
34 Any cooling device has a range of cooling states (i.e. different levels of
36 which the device is. For example, a fan's cooling states correspond to the
37 different fan speeds possible. Cooling states are referred to by single
39 precise set of cooling states associated with a device should be defined in
67 cpu-idle-states = <&LITTLE_CPU_SLEEP_0
/f-stack/freebsd/contrib/device-tree/src/arm64/arm/
H A Djuno-r1.dts65 idle-states {
100 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
117 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
134 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
151 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
168 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
185 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
H A Djuno.dts64 idle-states {
99 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
117 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
135 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
153 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
171 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
189 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
H A Djuno-r2.dts65 idle-states {
100 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
118 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
136 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
154 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
172 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
190 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
/f-stack/freebsd/contrib/device-tree/src/arm64/synaptics/
H A Das370.dtsi31 cpu-idle-states = <&CPU_SLEEP_0>;
40 cpu-idle-states = <&CPU_SLEEP_0>;
49 cpu-idle-states = <&CPU_SLEEP_0>;
58 cpu-idle-states = <&CPU_SLEEP_0>;
65 idle-states {
H A Dberlin4ct.dtsi35 cpu-idle-states = <&CPU_SLEEP_0>;
44 cpu-idle-states = <&CPU_SLEEP_0>;
53 cpu-idle-states = <&CPU_SLEEP_0>;
62 cpu-idle-states = <&CPU_SLEEP_0>;
69 idle-states {
/f-stack/freebsd/contrib/device-tree/Bindings/arm/msm/
H A Dqcom,idle-state.txt3 ARM provides idle-state node to define the cpuidle states, as defined in [1].
5 states. Idle states have different enter/exit latency and residency values.
6 The idle states supported by the QCOM SoC are defined as -
18 hierarchy to enter standby states, when all cpus are idle. An interrupt brings
59 the idle-states device node.
75 idle-states {
84 [1]. Documentation/devicetree/bindings/arm/idle-states.yaml
/f-stack/freebsd/contrib/device-tree/src/arm64/qcom/
H A Dmsm8998-clamshell.dtsi46 cpu-idle-states = <&LITTLE_CPU_SLEEP_1>;
50 cpu-idle-states = <&LITTLE_CPU_SLEEP_1>;
54 cpu-idle-states = <&LITTLE_CPU_SLEEP_1>;
58 cpu-idle-states = <&LITTLE_CPU_SLEEP_1>;
62 cpu-idle-states = <&BIG_CPU_SLEEP_1>;
66 cpu-idle-states = <&BIG_CPU_SLEEP_1>;
70 cpu-idle-states = <&BIG_CPU_SLEEP_1>;
74 cpu-idle-states = <&BIG_CPU_SLEEP_1>;
/f-stack/freebsd/contrib/device-tree/src/arm64/sprd/
H A Dsc9863a.dtsi51 cpu-idle-states = <&CORE_PD>;
59 cpu-idle-states = <&CORE_PD>;
67 cpu-idle-states = <&CORE_PD>;
75 cpu-idle-states = <&CORE_PD>;
83 cpu-idle-states = <&CORE_PD>;
91 cpu-idle-states = <&CORE_PD>;
99 cpu-idle-states = <&CORE_PD>;
107 cpu-idle-states = <&CORE_PD>;
111 idle-states {
H A Dsc9860.dtsi56 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
64 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
72 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
80 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
88 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
96 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
104 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
112 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
116 idle-states{
/f-stack/freebsd/contrib/zstd/doc/educational_decoder/
H A Dzstd_decompress.c1087 sequence_states_t states; in decompress_sequences() local
1091 states.ll_table = ctx->ll_dtable; in decompress_sequences()
1111 FSE_init_state(&states.ll_table, &states.ll_state, src, &bit_offset); in decompress_sequences()
1112 FSE_init_state(&states.of_table, &states.of_state, src, &bit_offset); in decompress_sequences()
1113 FSE_init_state(&states.ml_table, &states.ml_state, src, &bit_offset); in decompress_sequences()
1134 const u8 of_code = FSE_peek_symbol(&states->of_table, states->of_state); in decode_sequence()
1135 const u8 ll_code = FSE_peek_symbol(&states->ll_table, states->ll_state); in decode_sequence()
1136 const u8 ml_code = FSE_peek_symbol(&states->ml_table, states->ml_state); in decode_sequence()
1164 FSE_update_state(&states->ll_table, &states->ll_state, src, offset); in decode_sequence()
1165 FSE_update_state(&states->ml_table, &states->ml_state, src, offset); in decode_sequence()
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/f-stack/freebsd/contrib/device-tree/Bindings/pinctrl/
H A Dpinctrl-bindings.txt17 states. The number and names of those states is defined by the client device's
22 configuration used by those states.
31 they require certain specific named states for dynamic pin configuration.
41 Each client device's own binding determines the set of states that must be
61 the binding for that IP block requires certain pin states to
70 pinctrl-names: The list of names to assign states. List entry 0 defines the
76 /* For a client device requiring named states */
/f-stack/freebsd/contrib/device-tree/src/arm/
H A Dsunxi-bananapi-m2-plus-v1.2.dtsi23 gpios-states = <0x1>;
24 states = <1108475 0>, <1308475 1>;
H A Dsun8i-h3-emlid-neutis-n5h3-devboard.dts28 gpios-states = <0x1>;
29 states = <1100000 0x0>, <1300000 0x1>;
/f-stack/freebsd/contrib/device-tree/src/arm64/allwinner/
H A Dsun50i-h5-emlid-neutis-n5-devboard.dts39 gpios-states = <0x1>;
40 states = <1100000 0>, <1300000 1>;

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