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Searched refs:stages (Results 1 – 25 of 25) sorted by relevance

/f-stack/dpdk/app/test/
H A Dtest_graph_perf.c307 uint32_t stages, uint16_t nodes_per_stage, in graph_init() argument
339 (nb_srcs + nb_sinks + stages * nodes_per_stage)); in graph_init()
346 (nb_srcs + nb_sinks + stages * nodes_per_stage)); in graph_init()
364 node_map = malloc(sizeof(rte_node_t *) * stages + in graph_init()
365 sizeof(rte_node_t) * nodes_per_stage * stages); in graph_init()
372 for (i = 0; i < stages; i++) { in graph_init()
374 (rte_node_t *)(node_map + stages) + nodes_per_stage * i; in graph_init()
408 for (i = 0; i < stages - 1; i++) { in graph_init()
529 node_map[stages - 1][i]); in graph_init()
552 count = rte_node_edge_update(node_map[stages - 1][i], 0, in graph_init()
/f-stack/freebsd/contrib/device-tree/Bindings/sound/
H A Dti,tas5086.txt28 stages connected to the PWM output pins work. Not all
29 power stages are compatible to Mid-Z - please refer
/f-stack/dpdk/drivers/event/opdl/
H A Dopdl_ring.c121 struct opdl_stage *stages; member
131 return &t->stages[0]; in input_stage()
775 return opdl_stage_available(&t->stages[0]); in opdl_ring_available()
888 &t->stages[i].shared; in add_dep()
950 t->stages = st; in opdl_ring_create()
1105 s = &t->stages[t->num_stages]; in opdl_stage_add()
1206 const struct opdl_stage *s = &t->stages[i]; in opdl_ring_dump()
1237 rte_free(t->stages[i].deps); in opdl_ring_free()
1238 rte_free(t->stages[i].dep_tracking); in opdl_ring_free()
1241 rte_free(t->stages); in opdl_ring_free()
/f-stack/dpdk/doc/guides/howto/
H A Ddebug_troubleshoot.rst8 stages making use of single or multiple threads. Applications can use poll mode
21 the root cause through step by step debug at various stages.
34 primary process, with various processing stages running on multiple cores. The
205 * Heavy processing cycles at single or multiple processing stages.
207 * Cache is spread due to the increased stages in the pipeline.
222 #. Lower performance between the pipeline processing stages can be
364 * Check for event stages if the events are looped back into the same queue.
/f-stack/dpdk/doc/guides/tools/
H A Dtesteventdev.rst82 determines the number of stages used in the test application.
345 number of stages as mentioned in :numref:`table_eventdev_perf_queue_test`.
348 stages through the ``--wlcores``, ``--plcores`` and the ``--stlist`` application
354 Based on the number of stages to process(selected through ``--stlist``),
565 and number of stages as mentioned in :numref:`table_eventdev_pipeline_queue_test`.
567 The user can choose the number of workers and number of stages through the
578 Based on the number of stages to process(selected through ``--stlist``),
680 and number of stages as mentioned in :numref:`table_eventdev_pipeline_atq_test`.
/f-stack/freebsd/contrib/device-tree/Bindings/watchdog/
H A Dsbsa-gwdt.txt4 after two stages of timeout have elapsed. A detailed definition of the
/f-stack/freebsd/contrib/device-tree/Bindings/mmc/
H A Dmtk-sd.txt41 This field has total 32 stages.
44 This field has total 32 stages.
/f-stack/freebsd/contrib/device-tree/Bindings/firmware/
H A Dnvidia,tegra210-bpmp.txt4 in Tegra210 SoC. It is designed to handle the early stages of the boot
/f-stack/dpdk/doc/guides/sample_app_ug/
H A Deventdev_pipeline.rst13 configured for various numbers worker cores, stages,queue depths and cycles per
41 * ``-s4``: 4 atomic stages
H A Dpipeline.rst96 Application stages
H A Dip_pipeline.rst110 Application stages
/f-stack/dpdk/drivers/raw/ifpga/base/
H A Dopae_spi.h56 u8 stages:2; member
/f-stack/freebsd/contrib/device-tree/Bindings/clock/
H A Dlpc1850-cgu.txt12 stages. Each output stage provides an independent clock source and
/f-stack/freebsd/contrib/device-tree/Bindings/iommu/
H A Darm,smmu.yaml15 Management Unit Architecture, which can be used to provide 1 or 2 stages
/f-stack/dpdk/doc/guides/prog_guide/
H A Doverview.rst35 This allows work to be performed in stages and may allow more efficient use of code on cores.
H A Dpacket_framework.rst26 Packet processing applications are frequently structured as pipelines of multiple stages,
493 It is built as a pipeline of several stages (3 or 4), with each pipeline stage handling two differe…
501 The bucket search logic is broken into pipeline stages at the boundary of the next memory access.
517 By splitting the processing into several stages that are executed on different packets (the packets…
607 :numref:`figure_figure35` and :numref:`table_qos_27` detail the bucket search pipeline stages (eith…
H A Deventdev.rst142 Sample eventdev usage, with RX, two atomic stages and a single-link to TX.
H A Dqos_framework.rst408 The only other work available is to execute different stages of the enqueue sequence of operations …
411 …tes a pipelined implementation for the enqueue operation with 4 pipeline stages and each stage exe…
1430 The calculation of the drop probability occurs in two stages.
/f-stack/dpdk/doc/guides/rel_notes/
H A Drelease_18_02.rst189 The pipeline case can be used to simulate various stages in a real world
192 across the stages of the pipeline.
/f-stack/freebsd/contrib/device-tree/Bindings/powerpc/fsl/
H A Ddcsr.txt130 which stages the nexus trace data for transmission via the Aurora port
/f-stack/dpdk/doc/guides/nics/
H A Dice.rst65 ``priority``. Currently, we support two stages: priority = 0 or !0. Flows with
H A Dbnxt.rst685 either as a single rte_flow request or a combination of two stages.
/f-stack/dpdk/doc/guides/contributing/
H A Dvulnerability.rst41 In order to reduce the disclosure of a vulnerability in the early stages,
/f-stack/freebsd/contrib/zstd/programs/
H A Dzstd.1.md20 It is based on the **LZ77** family, with further FSE & huff0 entropy stages.
/f-stack/freebsd/contrib/zstd/
H A DCONTRIBUTING.md34 Our contribution process works in three main stages: