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/f-stack/dpdk/examples/qos_sched/
H A Dprofile_ov.cfg17 tb rate = 8400000 ; Bytes per second
20 tc 0 rate = 8400000 ; Bytes per second
21 tc 1 rate = 8400000 ; Bytes per second
22 tc 2 rate = 8400000 ; Bytes per second
23 tc 3 rate = 8400000 ; Bytes per second
24 tc 4 rate = 8400000 ; Bytes per second
25 tc 5 rate = 8400000 ; Bytes per second
26 tc 6 rate = 8400000 ; Bytes per second
27 tc 7 rate = 8400000 ; Bytes per second
28 tc 8 rate = 8400000 ; Bytes per second
[all …]
H A Dprofile.cfg32 tb rate = 1250000000 ; Bytes per second
35 tc 0 rate = 1250000000 ; Bytes per second
36 tc 1 rate = 1250000000 ; Bytes per second
37 tc 2 rate = 1250000000 ; Bytes per second
38 tc 3 rate = 1250000000 ; Bytes per second
39 tc 4 rate = 1250000000 ; Bytes per second
40 tc 5 rate = 1250000000 ; Bytes per second
41 tc 6 rate = 1250000000 ; Bytes per second
42 tc 7 rate = 1250000000 ; Bytes per second
43 tc 8 rate = 1250000000 ; Bytes per second
[all …]
/f-stack/app/redis-5.0.5/tests/unit/
H A Ddump.tcl95 set second [srv 0 client]
114 set second [srv 0 client]
134 set second [srv 0 client]
153 set second [srv 0 client]
159 $second set list somevalue
174 set second [srv 0 client]
186 assert {[$second ttl key] >= 7 && [$second ttl key] <= 10}
200 set second [srv 0 client]
221 set second [srv 0 client]
239 set second [srv 0 client]
[all …]
/f-stack/dpdk/doc/guides/sample_app_ug/
H A Dqos_scheduler.rst166 tb rate = 305175; Bytes per second
169 tc 0 rate = 305175; Bytes per second
170 tc 1 rate = 305175; Bytes per second
171 tc 2 rate = 305175; Bytes per second
172 tc 3 rate = 305175; Bytes per second
173 tc 4 rate = 305175; Bytes per second
174 tc 5 rate = 305175; Bytes per second
175 tc 6 rate = 305175; Bytes per second
176 tc 7 rate = 305175; Bytes per second
177 tc 8 rate = 305175; Bytes per second
[all …]
H A Dtimer.rst108 * The first timer (timer0) is loaded on the main lcore and expires every second.
112 * The second timer (timer1) is loaded on the next available lcore every 333 ms.
118 /* load timer0, every second, on main lcore, reloaded automatically */
126 /* load timer1, every second/3, on next lcore, reloaded manually */
154 The callback for the second timer (timer1) displays a message and reloads the timer on the next lco…
/f-stack/dpdk/lib/librte_fib/
H A Dtrie_avx512.c13 __m512i *first, __m512i *second, __m512i *third, __m512i *fourth) in transpose_x16() argument
43 *second = _mm512_permutexvar_epi32(perm_idxes.z, tmp3); in transpose_x16()
52 __m512i *first, __m512i *second) in transpose_x8() argument
66 *second = _mm512_permutexvar_epi64(perm_idxes.z, tmp4); in transpose_x8()
77 __m512i first, second, third, fourth; /*< IPv6 four byte chunks */ in trie_vec_lookup_x16() local
98 transpose_x16(ips, &first, &second, &third, &fourth); in trie_vec_lookup_x16()
134 ((i >= 4) ? second : first) : in trie_vec_lookup_x16()
174 __m512i first, second; /*< IPv6 eight byte chunks */ in trie_vec_lookup_x8_8b() local
192 transpose_x8(ips, &first, &second); in trie_vec_lookup_x8_8b()
212 byte_chunk = (i < 8) ? first : second; in trie_vec_lookup_x8_8b()
/f-stack/freebsd/contrib/device-tree/Bindings/gpio/
H A Dgpio-xilinx.txt12 second cell is used to specify optional parameters (currently unused).
21 - xlnx,is-dual : if 1, controller also uses the second channel
22 - xlnx,all-inputs-2 : as above but for the second channel
23 - xlnx,dout-default-2 : as above but the second channel
24 - xlnx,gpio2-width : as above but for the second channel
25 - xlnx,tri-default-2 : as above but for the second channel
H A Dgpio-clps711x.txt6 There should be two registers, first is DATA register, the second
10 the second cell is used to specify the gpio polarity:
H A Dgpio-vf610.txt11 - reg : The first reg tuple represents the PORT module, the second tuple
16 the second cell is used to specify the gpio polarity:
21 The second cell bits[3:0] is used to specify trigger type and level flags:
/f-stack/freebsd/contrib/device-tree/Bindings/dma/
H A Dmv-xor-v2.txt9 the second set is the global registers
15 - clock-names: mandatory if there is a second clock, in this case the
16 name must be "core" for the first clock and "reg" for the second
/f-stack/freebsd/contrib/device-tree/Bindings/interrupt-controller/
H A Dcdns,xtensa-pic.txt9 When it's 2, the first cell is the IRQ number, and the second cell
20 * two cells: second cell == 0: internal irq number
21 * second cell == 1: external irq number
H A Dcdns,xtensa-mx.txt13 * two cells: second cell == 0: internal irq number
14 * second cell == 1: external irq number
/f-stack/freebsd/contrib/device-tree/Bindings/crypto/
H A Dinside-secure-safexcel.txt12 - clocks: Reference to the crypto engine clocks, the second clock is
14 - clock-names: mandatory if there is a second clock, in this case the
16 the second one.
/f-stack/freebsd/contrib/device-tree/Bindings/rng/
H A Domap_rng.txt16 "inside-secure,safexcel-eip76" compatible, the second clock is
18 - clock-names: mandatory if there is a second clock, in this case the
19 name must be "core" for the first clock and "reg" for the second
/f-stack/freebsd/contrib/device-tree/Bindings/sound/
H A Dsamsung,tm2-audio.txt9 the second entry should be phandle of the HDMI
13 the second one I2S1
17 connection's sink, the second being the connection's
H A Dmvebu-audio.txt16 the data flow, and the second for errors.
20 The second one is optional and defines an external clock.
H A Dcirrus,madera.yaml37 and the second two cells must be 0. For muxed inputs the
39 right A inputs and the second two cells set the mode of the
99 description of this value. The second cell is ignored for
109 of this value. The second cell is ignored for codecs that
/f-stack/freebsd/contrib/device-tree/Bindings/iio/adc/
H A Dtwl4030-madc.txt12 - ti,system-uses-second-madc-irq: boolean, set if the second madc irq register
/f-stack/freebsd/contrib/device-tree/src/arm/
H A Dkirkwood-openrd.dtsi61 * mode for the second UART.
66 * To use the second UART, you need to change also
78 * SelUARTorSD selects between the second UART
/f-stack/app/nginx-1.16.1/src/http/
H A Dngx_http.c912 if (first->noname || second->noname) { in ngx_http_cmp_locations()
917 if (first->named && !second->named) { in ngx_http_cmp_locations()
922 if (!first->named && second->named) { in ngx_http_cmp_locations()
927 if (first->named && second->named) { in ngx_http_cmp_locations()
933 if (first->regex && !second->regex) { in ngx_http_cmp_locations()
938 if (!first->regex && second->regex) { in ngx_http_cmp_locations()
943 if (first->regex || second->regex) { in ngx_http_cmp_locations()
1583 ngx_http_conf_addr_t *first, *second; in ngx_http_cmp_conf_addrs() local
1593 if (second->opt.wildcard) { in ngx_http_cmp_conf_addrs()
1617 ngx_hash_key_t *first, *second; in ngx_http_cmp_dns_wildcards() local
[all …]
/f-stack/freebsd/contrib/device-tree/Bindings/net/
H A Dbrcm,unimac-mdio.txt8 base register, and the second one is optional and for indirect accesses to
17 are two separate interrupts, first one must be "mdio done" and second must be
21 "mdio_error" for the second when there are separate interrupts
H A Dcavium-mix.txt10 bank contains the MIX registers. The second bank the corresponding
19 interrupt routing and the second the routing for the AGL interrupts.
/f-stack/freebsd/contrib/device-tree/Bindings/
H A Dproperty-units.txt16 -sec : second
48 -kBps : kilobytes per second
/f-stack/freebsd/contrib/device-tree/src/arm64/mediatek/
H A Dmt8173-elm-hana.dtsi23 * second source touchscreen.
38 * second source trackpad.
/f-stack/freebsd/contrib/device-tree/Bindings/i2c/
H A Di2c-aspeed.txt11 clock in the second cell
13 the second cell

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