Searched refs:reg_bar (Results 1 – 5 of 5) sorted by relevance
195 ENA_REG_WRITE32(ena_dev->bus, aenq_caps, ena_dev->reg_bar + ENA_REGS_AENQ_CAPS_OFF); in ena_com_admin_init_aenq()875 return ENA_REG_READ32(ena_dev->bus, ena_dev->reg_bar + offset); in ena_com_reg_bar_read32()887 ena_dev->reg_bar + ENA_REGS_MMIO_REG_READ_OFF); in ena_com_reg_bar_read32()1331 io_sq->db_addr = (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_create_io_sq()1476 io_cq->unmask_reg = (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_create_io_cq()1481 (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_create_io_cq()1486 (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_create_io_cq()1764 ena_dev->reg_bar + ENA_REGS_INTR_MASK_OFF); in ena_com_set_admin_polling_mode()1883 admin_queue->sq.db_addr = (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_admin_init()2177 ena_dev->reg_bar + ENA_REGS_AENQ_HEAD_DB_OFF); in ena_com_aenq_intr_handler()[all …]
327 u8 __iomem *reg_bar; member
149 ENA_REG_WRITE32(dev->bus, addr_low, dev->reg_bar + ENA_REGS_AENQ_BASE_LO_OFF); in ena_com_admin_init_aenq()157 ENA_REG_WRITE32(dev->bus, aenq_caps, dev->reg_bar + ENA_REGS_AENQ_CAPS_OFF); in ena_com_admin_init_aenq()825 return ENA_REG_READ32(ena_dev->bus, ena_dev->reg_bar + offset); in ena_com_reg_bar_read32()837 ena_dev->reg_bar + ENA_REGS_MMIO_REG_READ_OFF); in ena_com_reg_bar_read32()1281 io_sq->db_addr = (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_create_io_sq()1424 io_cq->unmask_reg = (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_create_io_cq()1429 (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_create_io_cq()1434 (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_create_io_cq()1702 ena_dev->reg_bar + ENA_REGS_INTR_MASK_OFF); in ena_com_set_admin_polling_mode()1821 admin_queue->sq.db_addr = (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + in ena_com_admin_init()[all …]
299 u8 __iomem *reg_bar; member
1812 ena_dev->reg_bar = adapter->regs; in eth_ena_dev_init()