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Searched refs:reconfigured (Results 1 – 8 of 8) sorted by relevance

/f-stack/freebsd/contrib/device-tree/src/arm64/freescale/
H A Dimx8mq-hummingboard-pulse.dts166 * reconfigured to enable RTS/CTS on UART3
/f-stack/dpdk/doc/guides/eventdevs/
H A Ddlb.rst68 a. Setup queue(s). The reconfigured queue(s) lose their previous port links.
69 b. The reconfigured port(s) lose their previous queue links.
72 6. Restart the device. If the device is reconfigured in step 3 but one or more
82 This sequence is not supported because the event device must be reconfigured
H A Ddlb2.rst300 a. Setup queue(s). The reconfigured queue(s) lose their previous port links.
301 b. The reconfigured port(s) lose their previous queue links.
304 6. Restart the device. If the device is reconfigured in step 3 but one or more
314 This sequence is not supported because the event device must be reconfigured
/f-stack/dpdk/doc/guides/prog_guide/
H A Dlink_bonding_poll_mode_drv_lib.rst147 ``rte_eth_dev_stop`` and then reconfigured using ``rte_eth_dev_configure``
148 the RX and TX queues are also reconfigured using ``rte_eth_tx_queue_setup`` /
277 maximum of one bonded device. Slave devices are reconfigured with the
/f-stack/freebsd/contrib/device-tree/Bindings/fpga/
H A Dfpga-region.txt162 region is getting reconfigured (see Figure 1 above). During PR, the FPGA's
450 differences are that the FPGA is partially reconfigured due to the
/f-stack/app/redis-5.0.5/src/
H A Dsentinel.c1081 int reconfigured = 0; in sentinelUpdateSentinelAddressInAllMasters() local
1104 reconfigured++; in sentinelUpdateSentinelAddressInAllMasters()
1107 if (reconfigured) in sentinelUpdateSentinelAddressInAllMasters()
1109 "%@ %d additional matching instances", reconfigured); in sentinelUpdateSentinelAddressInAllMasters()
1110 return reconfigured; in sentinelUpdateSentinelAddressInAllMasters()
/f-stack/freebsd/netpfil/ipfw/
H A Ddummynet.txt284 if an object already exists it is reconfigured, otherwise it is
389 scheduler is simply reconfigured calling the config_scheduler() scheduler
/f-stack/dpdk/doc/guides/rel_notes/
H A Drelease_16_04.rst321 The MDIO clock speed must be reconfigured after the MAC reset. The MDIO clock