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Searched refs:rdmsr (Results 1 – 25 of 40) sorted by relevance

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/f-stack/freebsd/amd64/amd64/
H A Dinitcpu.c106 wrmsr(MSR_DE_CFG, rdmsr(MSR_DE_CFG) | 1); in init_amd()
117 msr = rdmsr(MSR_NB_CFG1); in init_amd()
131 msr = rdmsr(0xc001102a); in init_amd()
145 msr = rdmsr(MSR_LS_CFG); in init_amd()
155 msr = rdmsr(MSR_DE_CFG); in init_amd()
160 msr = rdmsr(MSR_LS_CFG); in init_amd()
165 msr = rdmsr(0xc0011028); in init_amd()
170 msr = rdmsr(MSR_LS_CFG); in init_amd()
222 wrmsr(0x110B, rdmsr(0x110B) | VIA_CPUID_DO_RNG); in init_via()
235 wrmsr(0x1107, rdmsr(0x1107) | (1 << 28)); in init_via()
[all …]
H A Dcpu_switch.S106 rdmsr
347 rdmsr
351 rdmsr
355 rdmsr
359 rdmsr
363 rdmsr
367 rdmsr
371 rdmsr
375 rdmsr
H A Dmpboot.S110 rdmsr
256 rdmsr
H A Dexception.S675 rdmsr
692 rdmsr
750 rdmsr
818 rdmsr
835 rdmsr
862 rdmsr
1026 rdmsr
1043 rdmsr
1213 rdmsr
1220 rdmsr
/f-stack/freebsd/amd64/vmm/intel/
H A Dvmx_msr.c67 return (rdmsr(MSR_VMX_BASIC) & 0xffffffff); in vmx_revision()
95 val = rdmsr(ctl_reg); in vmx_set_ctlreg()
97 trueval = rdmsr(true_ctl_reg); /* step c */ in vmx_set_ctlreg()
257 host_msrs[IDX_MSR_LSTAR] = rdmsr(MSR_LSTAR); in vmx_msr_init()
258 host_msrs[IDX_MSR_CSTAR] = rdmsr(MSR_CSTAR); in vmx_msr_init()
259 host_msrs[IDX_MSR_STAR] = rdmsr(MSR_STAR); in vmx_msr_init()
260 host_msrs[IDX_MSR_SF_MASK] = rdmsr(MSR_SF_MASK); in vmx_msr_init()
265 misc_enable = rdmsr(MSR_IA32_MISC_ENABLE); in vmx_msr_init()
380 guest_msrs[IDX_MSR_LSTAR] = rdmsr(MSR_LSTAR); in vmx_msr_guest_exit()
381 guest_msrs[IDX_MSR_CSTAR] = rdmsr(MSR_CSTAR); in vmx_msr_guest_exit()
[all …]
H A Dept.c86 cap = rdmsr(MSR_VMX_EPT_VPID_CAP); in ept_init()
/f-stack/freebsd/i386/i386/
H A Dinitcpu.c403 fcr = rdmsr(0x0107); in init_winchip()
499 apicbase = rdmsr(MSR_APICBASE); in init_ppro()
516 apicbase = rdmsr(MSR_APICBASE); in ppro_reenable_apic()
539 bbl_cr_ctl3 = rdmsr(MSR_BBL_CR_CTL3); in init_mendocino()
611 wrmsr(0x1107, rdmsr(0x1107) | fcr); in init_via()
623 wrmsr(0x80860004, rdmsr(0x80860004) | ~0UL); in init_transmeta()
693 wrmsr(0x1900, rdmsr(0x1900) | 0x20ULL); in initializecpu()
737 wrmsr(MSR_HWCR, rdmsr(MSR_HWCR) & ~0x08000); in initializecpu()
768 msr = rdmsr(MSR_EFER) | EFER_NXE; in initializecpu()
825 msr = rdmsr(0x83); /* HWCR */ in enable_K5_wt_alloc()
[all …]
H A Dlongrun.c96 msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN); in tmx86_get_longrun_mode()
99 flags = rdmsr(MSR_TMx86_LONGRUN_FLAGS) & 0x01; in tmx86_get_longrun_mode()
144 msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN); in tmx86_set_longrun_mode()
152 msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN_FLAGS); in tmx86_set_longrun_mode()
H A Dgeode.c131 a = rdmsr(0x5140000c); in cs5536_led_func()
217 a = rdmsr(0x5140000d); in cs5536_watchdog()
230 m = rdmsr(0x51400029); in cs5536_watchdog()
353 printf("MFGPT bar: %jx\n", rdmsr(0x5140000d)); in geode_probe()
H A Dk6_mem.c115 reg = rdmsr(UWCCR); in k6_mrinit()
168 reg = rdmsr(UWCCR); in k6_mrset()
H A Dperfmon.c203 pmc_shadow[pmc] = rdmsr(msr_pmc[pmc]) & 0xffffffffffULL; in perfmon_stop()
220 *val = rdmsr(msr_pmc[pmc]) & 0xffffffffffULL; in perfmon_read()
H A Dsupport.s366 rdmsr
433 rdmsr
448 rdmsr
/f-stack/freebsd/amd64/vmm/amd/
H A Dsvm_msr.c68 host_msrs[IDX_MSR_LSTAR] = rdmsr(MSR_LSTAR); in svm_msr_init()
69 host_msrs[IDX_MSR_CSTAR] = rdmsr(MSR_CSTAR); in svm_msr_init()
70 host_msrs[IDX_MSR_STAR] = rdmsr(MSR_STAR); in svm_msr_init()
71 host_msrs[IDX_MSR_SF_MASK] = rdmsr(MSR_SF_MASK); in svm_msr_init()
/f-stack/freebsd/x86/x86/
H A Dx86_mem.c213 msrv = rdmsr(msr); in x86_mrfetch()
225 msrv = rdmsr(msr); in x86_mrfetch()
237 msrv = rdmsr(msr); in x86_mrfetch()
252 msrv = rdmsr(msr); in x86_mrfetch()
256 msrv = rdmsr(msr + 1); in x86_mrfetch()
353 omsrv = rdmsr(msr); in x86_mrstoreone()
365 omsrv = rdmsr(msr); in x86_mrstoreone()
377 omsrv = rdmsr(msr); in x86_mrstoreone()
392 omsrv = rdmsr(msr); in x86_mrstoreone()
623 mtrrcap = rdmsr(MSR_MTRRcap); in x86_mrinit()
[all …]
H A Dmca.c544 rec->mr_mcg_cap = rdmsr(MSR_MCG_CAP); in mca_check_status()
703 ctl = rdmsr(MSR_MC_CTL2(bank)); in cmci_update()
770 mcg_cap = rdmsr(MSR_MCG_CAP); in mca_scan()
1087 ctl = rdmsr(MSR_MC_CTL2(i)); in cmci_monitor()
1096 ctl = rdmsr(MSR_MC_CTL2(i)); in cmci_monitor()
1107 ctl = rdmsr(MSR_MC_CTL2(i)); in cmci_monitor()
1141 ctl = rdmsr(MSR_MC_CTL2(i)); in cmci_resume()
1190 misc = rdmsr(mca_msr_ops.misc(i)); in amd_thresholding_monitor()
1278 mcg_cap = rdmsr(MSR_MCG_CAP); in _mca_init()
1294 mask = rdmsr(MSR_MC0_CTL_MASK); in _mca_init()
[all …]
H A Didentcpu.c1270 rdmsr(0x1002); /* Cyrix CPU generates fault. */ in identblue()
1534 msr = rdmsr(MSR_IA32_MISC_ENABLE); in fix_cpuid()
1551 msr = rdmsr(MSR_EXTFEATURES); in fix_cpuid()
1900 amd_whcr = rdmsr(0xc0000082); in print_AMD_info()
1912 amd_whcr = rdmsr(0xc0000082); in print_AMD_info()
2338 msr = rdmsr(MSR_VM_CR); in print_svm_info()
2465 val = rdmsr(true_msr); in vmx_settable()
2467 val = rdmsr(msr); in vmx_settable()
2481 msr = rdmsr(MSR_IA32_FEATURE_CONTROL); in print_vmx_info()
2484 basic = rdmsr(MSR_VMX_BASIC); in print_vmx_info()
[all …]
H A Ducode.c114 orev = rdmsr(MSR_BIOS_SIGN) >> 32; in ucode_intel_load()
135 nrev = rdmsr(MSR_BIOS_SIGN) >> 32; in ucode_intel_load()
188 platformid = rdmsr(MSR_IA32_PLATFORM_ID); in ucode_intel_match()
H A Dcpu_machdep.c129 v = rdmsr(a->msr); in x86_msr_op_one()
134 v = rdmsr(a->msr); in x86_msr_op_one()
243 v = rdmsr(MSR_IA32_SPEC_CTRL); in acpi_cpu_idle_mwait()
306 mcnt = rdmsr(MSR_MPERF); in cpu_est_clockrate()
307 acnt = rdmsr(MSR_APERF); in cpu_est_clockrate()
622 msr = rdmsr(MSR_AMDK8_IPM); in cpu_idle()
H A Dtsc.c244 if (rdmsr(MSR_MPERF) > 0 && rdmsr(MSR_APERF) > 0) in probe_tsc_freq()
282 (rdmsr(0x1203) & 0x100000000ULL) == 0) in probe_tsc_freq()
/f-stack/freebsd/amd64/vmm/
H A Dvmm_host.c52 vmm_host_efer = rdmsr(MSR_EFER); in vmm_host_state_init()
53 vmm_host_pat = rdmsr(MSR_PAT); in vmm_host_state_init()
/f-stack/freebsd/x86/cpufreq/
H A Dhwpstate_amd.c181 msr = rdmsr(MSR_AMD_10H_11H_LIMIT); in hwpstate_goto_pstate()
223 msr = rdmsr(MSR_AMD_10H_11H_STATUS); in hwpstate_goto_pstate()
273 msr = rdmsr(MSR_AMD_10H_11H_STATUS); in hwpstate_get()
398 msr = rdmsr(MSR_AMD_10H_11H_LIMIT); in hwpstate_probe()
437 msr = rdmsr(MSR_AMD_10H_11H_LIMIT); in hwpstate_get_info_from_msr()
441 msr = rdmsr(MSR_AMD_10H_11H_CONFIG + i); in hwpstate_get_info_from_msr()
H A Dpowernow.c281 status = rdmsr(MSR_AMDK7_FIDVID_STATUS); in pn7_setfidvid()
289 ctl = rdmsr(MSR_AMDK7_FIDVID_CTL) & PN7_CTR_FIDCHRATIO; in pn7_setfidvid()
320 *status = rdmsr(MSR_AMDK7_FIDVID_STATUS); in pn8_read_pending_wait()
490 status = rdmsr(MSR_AMDK7_FIDVID_STATUS); in pn_get()
656 status = rdmsr(MSR_AMDK7_FIDVID_STATUS); in pn_decode_pst()
826 status = rdmsr(MSR_AMDK7_FIDVID_STATUS); in pn_decode_acpi()
894 status = rdmsr(MSR_AMDK7_FIDVID_STATUS); in pn_probe()
H A Dp4tcc.c285 msr = rdmsr(MSR_THERM_CONTROL); in p4tcc_set()
327 msr = rdmsr(MSR_THERM_CONTROL); in p4tcc_get()
/f-stack/dpdk/lib/librte_eal/x86/
H A Drte_cycles.c30 rdmsr(int msr, uint64_t *val) in rdmsr() function
118 ret = rdmsr(0xCE, &tsc_hz); in get_tsc_freq_arch()
/f-stack/freebsd/x86/acpica/
H A Dacpi_wakeup.c260 WAKECODE_FIXUP(wakeup_efer, uint64_t, rdmsr(MSR_EFER) & in acpi_sleep_machdep()
264 WAKECODE_FIXUP(wakeup_efer, uint64_t, rdmsr(MSR_EFER)); in acpi_sleep_machdep()

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