| /f-stack/freebsd/contrib/device-tree/Bindings/rtc/ |
| H A D | isil,isl12026.txt | 14 - "isil,pwr-bsw": If present PWR.BSW bit must be set to the specified
17 - "isil,pwr-sbib": If present PWR.SBIB bit must be set to the specified
26 isil,pwr-bsw = <0>;
27 isil,pwr-sbib = <1>;
|
| /f-stack/freebsd/contrib/device-tree/Bindings/regulator/ |
| H A D | st,stm32mp1-pwr-reg.yaml | 4 $id: http://devicetree.org/schemas/regulator/st,stm32mp1-pwr-reg.yaml#
14 const: st,stm32mp1,pwr-reg
39 pwr@50001000 {
40 compatible = "st,stm32mp1,pwr-reg";
|
| /f-stack/freebsd/contrib/device-tree/Bindings/ata/ |
| H A D | ahci-st.txt | 17 - reset-names : Associated names must be; "pwr-dwn", "sw-rst" and "pwr-rst"
32 reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
|
| /f-stack/freebsd/contrib/device-tree/Bindings/gpu/ |
| H A D | nvidia,gk20a.txt | 25 - pwr
54 clock-names = "gpu", "pwr";
72 clock-names = "gpu", "pwr", "ref";
89 clock-names = "gpu", "pwr";
108 clock-names = "gpu", "pwr", "fuse";
|
| /f-stack/freebsd/contrib/device-tree/Bindings/arm/tegra/ |
| H A D | nvidia,tegra20-pmc.yaml | 82 nvidia,cpu-pwr-good-en:
96 nvidia,cpu-pwr-good-time:
100 nvidia,cpu-pwr-off-time:
104 nvidia,core-pwr-good-time:
110 nvidia,core-pwr-off-time:
312 "nvidia,suspend-mode": ["nvidia,core-pwr-off-time", "nvidia,cpu-pwr-off-time"]
313 "nvidia,core-pwr-off-time": ["nvidia,core-pwr-good-time"]
314 "nvidia,cpu-pwr-off-time": ["nvidia,cpu-pwr-good-time"]
332 nvidia,cpu-pwr-good-time = <0>;
333 nvidia,cpu-pwr-off-time = <0>;
[all …]
|
| /f-stack/freebsd/contrib/device-tree/src/arm/ |
| H A D | stih410-pinctrl.dtsi | 16 usb-pwr-enable = <&pio35 1 ALT1 OUT>;
25 usb-pwr-enable = <&pio35 3 ALT1 OUT>;
|
| H A D | rk3066a-mk808.dts | 58 regulator-name = "host-pwr";
150 sdmmc_pwr: sdmmc-pwr {
156 wifi_pwr: wifi-pwr {
|
| H A D | rk3066a-rayeager.dts | 109 regulator-name = "host-pwr";
342 pwr_key: pwr-key {
354 sdmmc_pwr: sdmmc-pwr {
368 sata_pwr: sata-pwr {
388 pwr_hold: pwr-hold {
|
| H A D | imx53-cx9020.dts | 89 pwr-r {
94 pwr-g {
99 pwr-b {
|
| H A D | armada-370-mirabox.dts | 45 label = "mirabox:green:pwr";
144 pwr_led_pin: pwr-led-pin {
|
| H A D | rk3288-rock2-square.dts | 212 pwr_key: pwr-key {
240 sata_pwr_en: sata-pwr-en {
246 sdmmc_pwr: sdmmc-pwr {
|
| H A D | rk3288-firefly-reload.dts | 315 dvp_pwr: dvp-pwr {
319 cif_pwr: cif-pwr {
331 pwr_key: pwr-key {
366 sdmmc_pwr: sdmmc-pwr {
|
| H A D | armada-388-gp.dts | 285 reg_sata0: pwr-sata0 {
311 reg_sata1: pwr-sata1 {
337 reg_sata2: pwr-sata2 {
361 reg_sata3: pwr-sata3 {
|
| H A D | nspire.dtsi | 174 pwr: pwr@900B0000 { label
|
| H A D | armada-xp-synology-ds414.dts | 208 sata1_pwr_pin: sata1-pwr-pin {
213 sata2_pwr_pin: sata2-pwr-pin {
218 sata3_pwr_pin: sata3-pwr-pin {
223 sata4_pwr_pin: sata4-pwr-pin {
|
| /f-stack/freebsd/contrib/device-tree/src/arm64/broadcom/stingray/ |
| H A D | stingray-board-base.dtsi | 38 full-pwr-cycle;
42 full-pwr-cycle;
|
| /f-stack/freebsd/contrib/device-tree/Bindings/pinctrl/ |
| H A D | marvell,dove-pinctrl.txt | 68 cpu-pwr-down Pin is used for CPU_PWRDWN
69 standby-pwr-down Pin is used for STBY_PWRDWN
70 core-pwr-good Pin is used for CORE_PWR_GOOD (Pins 0-7 only)
71 cpu-pwr-good Pin is used for CPU_PWR_GOOD (Pins 8-15 only)
|
| H A D | brcm,iproc-gpio.txt | 84 pwr: pwr {
114 gpio-pwr = <&gpio_ccm 0 0>;
|
| H A D | brcm,nsp-gpio.txt | 75 pwr: pwr {
|
| /f-stack/freebsd/contrib/device-tree/src/arm64/allwinner/ |
| H A D | sun50i-h5-nanopi-neo2.dts | 25 pwr {
26 label = "nanopi:green:pwr";
|
| H A D | sun50i-h5-orangepi-zero-plus2.dts | 36 pwr {
37 label = "orangepi:green:pwr";
|
| H A D | sun50i-h5-orangepi-zero-plus.dts | 36 pwr {
37 label = "orangepi:green:pwr";
|
| H A D | sun50i-h5-nanopi-neo-plus2.dts | 28 pwr {
29 label = "nanopi:green:pwr";
|
| /f-stack/freebsd/contrib/device-tree/src/arm64/nvidia/ |
| H A D | tegra210-p2180.dtsi | 287 nvidia,cpu-pwr-good-time = <0>;
288 nvidia,cpu-pwr-off-time = <0>;
289 nvidia,core-pwr-good-time = <4587 3876>;
290 nvidia,core-pwr-off-time = <39065>;
|
| /f-stack/freebsd/contrib/device-tree/Bindings/leds/ |
| H A D | leds-lp55xx.txt | 21 - pwr-sel: LP8501 specific property. Power selection for output channels.
166 9 channels are defined. The 'pwr-sel' is LP8501 specific property.
173 pwr-sel = /bits/ 8 <3>; /* D1~9 connected to VOUT */
|