Searched refs:prt_cfg (Results 1 – 2 of 2) sorted by relevance
428 cvmx_dpi_sli_prtx_cfg_t prt_cfg; in cvmx_srio_initialize() local696 prt_cfg.u64 = cvmx_read_csr(CVMX_DPI_SLI_PRTX_CFG(srio_port)); in cvmx_srio_initialize()697 prt_cfg.s.mps = 1; in cvmx_srio_initialize()698 prt_cfg.s.mrrs = 1; in cvmx_srio_initialize()699 prt_cfg.s.molr = 32; in cvmx_srio_initialize()701 prt_cfg.s.molr = ((prt_cfg.s.qlm_cfg == 1 || prt_cfg.s.qlm_cfg == 3) ? 8 in cvmx_srio_initialize()702 : (prt_cfg.s.qlm_cfg == 4 || prt_cfg.s.qlm_cfg == 6) ? 16 in cvmx_srio_initialize()704 cvmx_write_csr(CVMX_DPI_SLI_PRTX_CFG(srio_port), prt_cfg.u64); in cvmx_srio_initialize()713 … sriox_imsg_vport_thr.s.max_tot = ((prt_cfg.s.qlm_cfg == 1 || prt_cfg.s.qlm_cfg == 3) ? 44 : 46); in cvmx_srio_initialize()
221 cvmx_dpi_sli_prtx_cfg_t prt_cfg; in __cvmx_pcie_rc_initialize_config_space() local223 prt_cfg.u64 = cvmx_read_csr(CVMX_DPI_SLI_PRTX_CFG(pcie_port)); in __cvmx_pcie_rc_initialize_config_space()224 prt_cfg.s.mps = MPS_CN6XXX; in __cvmx_pcie_rc_initialize_config_space()225 prt_cfg.s.mrrs = MRRS_CN6XXX; in __cvmx_pcie_rc_initialize_config_space()227 prt_cfg.s.molr = 32; in __cvmx_pcie_rc_initialize_config_space()228 cvmx_write_csr(CVMX_DPI_SLI_PRTX_CFG(pcie_port), prt_cfg.u64); in __cvmx_pcie_rc_initialize_config_space()1560 cvmx_dpi_sli_prtx_cfg_t prt_cfg; in cvmx_pcie_ep_initialize() local1562 prt_cfg.u64 = cvmx_read_csr(CVMX_DPI_SLI_PRTX_CFG(pcie_port)); in cvmx_pcie_ep_initialize()1563 prt_cfg.s.mps = MPS_CN6XXX; in cvmx_pcie_ep_initialize()1564 prt_cfg.s.mrrs = MRRS_CN6XXX; in cvmx_pcie_ep_initialize()[all …]