| /f-stack/freebsd/contrib/device-tree/Bindings/phy/ |
| H A D | ti,phy-j721e-wiz.yaml | 50 assigned-clock-parents:
87 assigned-clock-parents:
94 - assigned-clock-parents
132 assigned-clock-parents:
139 - assigned-clock-parents
176 assigned-clock-parents = <&k3_clks 292 15>, <&k3_clks 292 4>;
185 assigned-clock-parents = <&k3_clks 293 13>;
192 assigned-clock-parents = <&k3_clks 293 0>;
210 assigned-clock-parents = <&k3_clks 292 11>;
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| H A D | ti,phy-am654-serdes.txt | 29 - assigned-clock-parents: As defined in
56 The assigned-clocks and assigned-clock-parents is used here to set the
71 assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>;
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| /f-stack/freebsd/contrib/device-tree/Bindings/sound/ |
| H A D | nvidia,tegra210-ahub.yaml | 45 assigned-clock-parents:
65 - assigned-clock-parents
80 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
117 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
128 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
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| H A D | nvidia,tegra210-dmic.yaml | 44 assigned-clock-parents:
65 - assigned-clock-parents
77 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
|
| H A D | nvidia,tegra186-dspk.yaml | 43 assigned-clock-parents:
64 - assigned-clock-parents
77 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
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| H A D | nvidia,tegra210-i2s.yaml | 60 assigned-clock-parents:
83 - assigned-clock-parents
95 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
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| H A D | brcm,cygnus-audio.txt | 14 - assigned-clock-parents: parent clocks of the assigned clocks
40 assigned-clock-parents = <&audiopll BCM_CYGNUS_AUDIOPLL>;
|
| /f-stack/freebsd/contrib/device-tree/Bindings/ufs/ |
| H A D | ti,j721e-ufs.yaml | 31 assigned-clock-parents:
73 assigned-clock-parents = <&k3_clks 277 4>;
87 assigned-clock-parents = <&k3_clks 277 4>;
|
| /f-stack/freebsd/contrib/device-tree/src/arm/ |
| H A D | imx7ulp.dtsi | 155 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
167 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
176 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
262 assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
286 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
334 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
346 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
358 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
370 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
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| H A D | exynos5422-odroidxu4.dts | 47 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
82 assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
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| H A D | exynos5422-odroidxu3-audio.dtsi | 41 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
88 assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
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| H A D | imx7d-meerkat96.dts | 144 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
152 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
161 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
169 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
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| H A D | imx7d-pico.dtsi | 107 assigned-clock-parents = <&clks IMX7D_CKIL>;
123 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
280 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
314 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
322 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
331 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
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| H A D | exynos4412-odroid-common.dtsi | 155 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
213 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
221 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
229 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
237 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
523 assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
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| H A D | mt7629.dtsi | 101 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL1_D2>;
253 assigned-clock-parents =
269 assigned-clock-parents = <&topckgen CLK_TOP_SYSPLL1_D2>;
323 assigned-clock-parents = <&topckgen CLK_TOP_SYSPLL1_D2>,
385 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL2_D4>,
470 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL1_D2>,
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| H A D | exynos4412-itop-elite.dts | 131 assigned-clock-parents = <&clock CLK_XUSBXTI>;
139 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
161 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
|
| /f-stack/freebsd/contrib/device-tree/Bindings/clock/ |
| H A D | sprd,sc9860-clk.txt | 27 parents are in, since each clk node would represent many clocks
29 relationship (i.e. how many parents and which are the parents)
|
| /f-stack/freebsd/contrib/device-tree/src/arm64/ti/ |
| H A D | k3-j721e-main.dtsi | 345 assigned-clock-parents = <&k3_clks 292 11>;
352 assigned-clock-parents = <&k3_clks 292 0>;
409 assigned-clock-parents = <&k3_clks 293 0>;
466 assigned-clock-parents = <&k3_clks 294 0>;
516 assigned-clock-parents = <&k3_clks 295 9>;
523 assigned-clock-parents = <&k3_clks 295 0>;
530 assigned-clock-parents = <&k3_clks 295 9>;
826 assigned-clock-parents = <&k3_clks 91 2>;
844 assigned-clock-parents = <&k3_clks 92 1>;
860 assigned-clock-parents = <&k3_clks 93 1>;
[all …]
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| /f-stack/freebsd/contrib/device-tree/Bindings/watchdog/ |
| H A D | fsl-imx7ulp-wdt.yaml | 32 assigned-clocks-parents:
56 assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
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| H A D | ti,rti-wdt.yaml | 40 assigned-clocks-parents:
64 assigned-clock-parents = <&k3_clks 252 5>;
|
| /f-stack/freebsd/contrib/device-tree/Bindings/pwm/ |
| H A D | imx-tpm-pwm.yaml | 30 assigned-clock-parents:
52 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
|
| H A D | pwm-sprd.txt | 17 - assigned-clock-parents: The phandle of the parent clock of PWM clock.
35 assigned-clock-parents = <&ext_26m>,
|
| /f-stack/freebsd/contrib/device-tree/Bindings/rtc/ |
| H A D | st,stm32-rtc.yaml | 50 assigned-clock-parents:
102 assigned-clock-parents: false
124 assigned-clock-parents = <&rcc 1 CLK_LSE>;
|
| /f-stack/freebsd/contrib/device-tree/Bindings/spi/ |
| H A D | spi-slave-mt27xx.txt | 14 - assigned-clock-parents: parent of mux clock.
31 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL1_D2>;
|
| /f-stack/freebsd/contrib/device-tree/Bindings/arm/ |
| H A D | sp810.txt | 31 - assigned-clock-parents: from the common clock binding;
44 …assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz…
|