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/f-stack/freebsd/contrib/device-tree/Bindings/display/
H A Darm,pl11x.txt48 - arm,pl11x,tft-r0g0b0-pads: an array of three 32-bit values,
49 defining the way CLD pads are wired up; first value
58 arm,pl11x,tft-r0g0b0-pads = <4 15 20>;
60 arm,pl11x,tft-r0g0b0-pads = <1 7 13>;
62 arm,pl11x,tft-r0g0b0-pads = <3 11 19>;
64 arm,pl11x,tft-r0g0b0-pads = <3 10 19>;
66 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
68 arm,pl11x,tft-r0g0b0-pads = <16 8 0>;
/f-stack/freebsd/contrib/device-tree/src/arm64/nvidia/
H A Dtegra210-p2371-2180.dts22 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>,
23 <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
24 <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>,
25 <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>;
31 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
H A Dtegra194-p2972-0000.dts43 pads {
96 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
97 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-3}>,
98 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-0}>,
99 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-3}>;
H A Dtegra194-p3509-0000+p3668-0000.dts38 pads {
83 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
84 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-2}>,
85 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}>;
H A Dtegra210-p3450-0000.dts41 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
42 <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>,
43 <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>,
44 <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
51 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>;
448 phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>,
449 <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>,
450 <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>,
451 <&{/padctl@7009f000/pads/pcie/lanes/pcie-6}>;
474 pads {
H A Dtegra186-p2771-0000.dts125 pads {
206 phys = <&{/padctl@3520000/pads/usb2/lanes/usb2-0}>,
207 <&{/padctl@3520000/pads/usb2/lanes/usb2-1}>,
208 <&{/padctl@3520000/pads/usb3/lanes/usb3-0}>;
/f-stack/freebsd/contrib/device-tree/Bindings/ata/
H A Dcortina,gemini-sata-bridge.txt20 ata0 slave interface brought out on IDE pads
23 ata1 slave interface brought out on IDE pads
27 on IDE pads
31 on IDE pads
/f-stack/freebsd/contrib/device-tree/Bindings/pinctrl/
H A Dnvidia,tegra124-dpaux-padctl.txt21 needed to describe the pin mux'ing options for the DPAUX pads.
23 single set of pads, the child nodes only need to describe the pad group
24 the functions are being applied to rather than the individual pads.
H A Dfsl,imx7d-pinctrl.txt22 Peripherals using pads from iomuxc-lpsr support low state retention power
23 state, under LPSR mode GPIO's state of pads are retain.
57 advantages of LPSR power mode, is also possible that an IP to use pads from
H A Dnvidia,tegra124-xusb-padctl.txt11 assigned to one out of a set of different pads. Some of these pads have an
40 Each subnode describes groups of lanes along with parameters and pads that
/f-stack/freebsd/contrib/device-tree/Bindings/display/tegra/
H A Dnvidia,tegra114-mipi.txt10 - #nvidia,mipi-calibrate-cells: Should be 1. The cell is a bitmask of the pads
14 phandle to refer to the calibration controller node and a bitmask of the pads
/f-stack/freebsd/contrib/device-tree/Bindings/pci/
H A Dnvidia,tegra20-pcie.txt17 "pads": PADS registers
174 reg-names = "pads", "afi", "cs";
275 reg-names = "pads", "afi", "cs";
380 reg-names = "pads", "afi", "cs";
452 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
459 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>;
476 reg-names = "pads", "afi", "cs";
546 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>,
547 <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
548 <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>,
[all …]
/f-stack/freebsd/contrib/device-tree/Bindings/usb/
H A Dnvidia,tegra124-xusb.txt43 configure the USB pads used by the XHCI controller
119 phys = <&{/padctl@0,7009f000/pads/usb2/lanes/usb2-1}>, /* mini-PCIe USB */
120 <&{/padctl@0,7009f000/pads/usb2/lanes/usb2-2}>, /* USB A */
121 <&{/padctl@0,7009f000/pads/pcie/lanes/pcie-0}>; /* USB A */
/f-stack/freebsd/contrib/device-tree/Bindings/phy/
H A Dnvidia,tegra124-xusb-padctl.txt5 signals) which connect directly to pins/pads on the SoC package. Each lane
74 A required child node named "pads" contains a list of subnodes, one for each
75 of the pads exposed by the XUSB pad controller. Each pad may need additional
82 For Tegra124 and Tegra132, the following pads exist: usb2, ulpi, hsic, pcie
83 and sata. No extra resources are required for operation of these pads.
85 For Tegra210, the following pads exist: usb2, hsic, pcie and sata. Below is
279 pads {
411 pads {
507 pads {
663 pads {
H A Dnvidia,tegra20-usb-phy.txt22 - utmi-pads: The clock needed to access the UTMI pad control registers.
32 - utmi-pads: The reset of the PHY containing the chip-wide UTMI pad control
/f-stack/freebsd/contrib/device-tree/Bindings/interrupt-controller/
H A Damlogic,meson-gpio-intc.txt4 pads and generate an interrupt on edge or level. The controller is essentially
5 a 256 pads to 8 GIC interrupt multiplexer, with a filter block to select edge
/f-stack/freebsd/contrib/device-tree/Bindings/arm/tegra/
H A Dnvidia,tegra186-pmc.txt56 The following pads are present on Tegra186:
80 Note: The power state can be configured on all of the above pads except
81 for ao-hv. Following pads have software configurable signaling
H A Dnvidia,tegra20-pmc.yaml259 The following pads are present on Tegra124 and Tegra132
264 The following pads are present on Tegra210
291 pads. None of the Tegra124 or Tegra132 pads support signaling
293 All of the listed Tegra210 pads except pex-cntrl support power
295 on below Tegra210 pads.
/f-stack/freebsd/contrib/device-tree/Bindings/display/panel/
H A Dti,nspire.yaml33 remote-endpoint = <&pads>;
/f-stack/freebsd/contrib/device-tree/src/arm/
H A Duniphier-ld6b.dtsi19 /* UART3 unavailable: the pads are not wired to the package balls */
H A Dtegra124-nyan.dtsi398 phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* 1st USB A */
399 <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Internal USB */
400 <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* 2nd USB A */
401 <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, /* 1st USB A */
402 <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>; /* 2nd USB A */
425 pads {
H A Domap4-mcpdm.dtsi32 * McPDM pads must be muxed at the interconnect target module
H A Dtegra114.dtsi117 nvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB pads */
133 nvidia,mipi-calibrate = <&mipi 0x180>; /* DSIC & DSID pads */
713 clock-names = "reg", "pll_u", "utmi-pads";
715 reset-names = "usb", "utmi-pads";
751 clock-names = "reg", "pll_u", "utmi-pads";
753 reset-names = "usb", "utmi-pads";
/f-stack/freebsd/contrib/device-tree/Bindings/regulator/
H A Dpbias-regulator.txt1 PBIAS internal regulator for SD card dual voltage i/o pads on OMAP SoCs.
/f-stack/freebsd/contrib/device-tree/Bindings/arm/freescale/
H A Dfsl,scu.txt119 <dt-bindings/pinctrl/pads-imx8qm.h>,
120 <dt-bindings/pinctrl/pads-imx8qxp.h>,
121 <dt-bindings/pinctrl/pads-imx8dxl.h>.

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