| /f-stack/freebsd/contrib/device-tree/Bindings/spi/ |
| H A D | fsl-imx-cspi.txt | 6 - "fsl,imx1-cspi" for SPI compatible with the one integrated on i.MX1
7 - "fsl,imx21-cspi" for SPI compatible with the one integrated on i.MX21
8 - "fsl,imx27-cspi" for SPI compatible with the one integrated on i.MX27
9 - "fsl,imx31-cspi" for SPI compatible with the one integrated on i.MX31
10 - "fsl,imx35-cspi" for SPI compatible with the one integrated on i.MX35
11 - "fsl,imx51-ecspi" for SPI compatible with the one integrated on i.MX51
12 - "fsl,imx53-ecspi" for SPI compatible with the one integrated on i.MX53 and later Soc
13 - "fsl,imx8mq-ecspi" for SPI compatible with the one integrated on i.MX8MQ
14 - "fsl,imx8mm-ecspi" for SPI compatible with the one integrated on i.MX8MM
15 - "fsl,imx8mn-ecspi" for SPI compatible with the one integrated on i.MX8MN
[all …]
|
| /f-stack/freebsd/contrib/device-tree/Bindings/serial/ |
| H A D | fsl-lpuart.txt | 5 - "fsl,vf610-lpuart" for lpuart compatible with the one integrated
7 - "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated
9 - "fsl,ls1028a-lpuart" for lpuart compatible with the one integrated
11 - "fsl,imx7ulp-lpuart" for lpuart compatible with the one integrated
13 - "fsl,imx8qxp-lpuart" for lpuart compatible with the one integrated
15 - "fsl,imx8qm-lpuart" for lpuart compatible with the one integrated
19 - clocks : phandle + clock specifier pairs, one for each entry in clock-names
26 - dmas: A list of two dma specifiers, one for each entry in dma-names.
|
| /f-stack/freebsd/contrib/device-tree/Bindings/usb/ |
| H A D | gr-udc.txt | 15 - interrupts : Interrupt numbers for this device. Either one interrupt number
16 for all interrupts, or one for status related interrupts, one for IN
17 endpoint related interrupts and one for OUT endpoint related interrupts.
23 number. If the property is present it typically contains one entry for
29 number. If the property is present it typically contains one entry for
|
| H A D | mediatek,mtk-xhci.txt | 5 There are two scenarios: the first one only supports xHCI driver;
6 the second one supports dual-role mode, and the host is based on xHCI
17 addition, one of:
26 - clocks : a list of phandle + clock-specifier pairs, one for each
43 - the first one : register base address of the glue layer in syscon;
44 - the second one : hardware version of the glue layer
92 addition, one of:
101 - clocks : a list of phandle + clock-specifier pairs, one for each
|
| /f-stack/freebsd/contrib/device-tree/Bindings/soc/rockchip/ |
| H A D | grf.txt | 21 - compatible: GRF should be one of the following:
33 - compatible: DETECTGRF should be one of the following:
35 - compatilbe: COREGRF should be one of the following:
37 - compatible: PMUGRF should be one of the following:
41 - compatible: SGRF should be one of the following:
43 - compatible: USB2PHYGRF should be one of the following:
46 - compatible: USBGRF should be one of the following:
|
| /f-stack/freebsd/contrib/device-tree/Bindings/pinctrl/ |
| H A D | sprd,pinctrl.txt | 6 register contains several bit fields with one bit or several bits
12 to choose one function (like: UART0) for which system, since we
13 have several systems (AP/CP/CM4) on one SoC.).
17 as one generic configuration, and maybe it will add more strange
18 global configuration in future. Then we add one "sprd,control" to
22 Moreover we recognise every fields comprising one bit or several
23 bits in one global control register as one pin, thus we should
28 register definition, and each register described one pin is used
57 register definition, and each register described one pin is used to
|
| /f-stack/freebsd/contrib/device-tree/Bindings/iommu/ |
| H A D | samsung,sysmmu.yaml | 23 System MMUs are in many to one relation with peripheral devices, i.e. single
24 peripheral device might have multiple System MMUs (usually one for each bus
25 master), but one System MMU can handle transactions from only one peripheral
31 * MFC has one System MMU on its left and right bus.
32 * FIMD in Exynos5420 has one System MMU for window 0 and 4, the other system MMU
34 * M2M Scalers and G2D in Exynos5420 has one System MMU on the read channel and
|
| /f-stack/freebsd/contrib/device-tree/Bindings/sound/ |
| H A D | atmel-i2s.txt | 8 - dmas: Should be one per channel name listed in the dma-names property,
11 This IP also supports one shared channel for both rx and tx;
12 if this mode is used, one "rx-tx" name must be used.
15 - clock-names: Should be one of each entry matching the clocks phandles list:
22 - princtrl-names: Should contain only one value - "default".
|
| H A D | designware-i2s.txt | 7 clocks. The controller expects one clock: the clock used as the sampling
11 the core. The core expects one or two dma channels: one for transmit and
12 one for receive.
|
| /f-stack/freebsd/contrib/device-tree/Bindings/phy/ |
| H A D | brcm,stingray-usb-phy.txt | 4 - compatible : should be one of the listed compatibles
5 - "brcm,sr-usb-combo-phy" is combo PHY has two PHYs, one SS and one HS.
9 - Must be 1 for brcm,sr-usb-combo-phy as it expects one argument to indicate
|
| /f-stack/freebsd/contrib/device-tree/Bindings/timer/ |
| H A D | nvidia,tegra210-timer.txt | 3 The Tegra210 timer provides fourteen 29-bit timer counters and one 32-bit
6 (TMR10-TMR13). Each TMR can be programmed to generate one-shot, periodic,
12 - interrupts : A list of 14 interrupts; one per each timer channels 0 through
14 - clocks : Must contain one entry, for the module clock.
|
| /f-stack/freebsd/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | abilis,tb10x-ictl.txt | 5 one-to-one mapping of external interrupt sources to CPU interrupts and
18 are mapped one-to-one to parent interrupts.
|
| /f-stack/tools/libxo/tests/core/saved/ |
| H A D | test_09.X.out | 1 …em>ladder</item><item>bolt</item><item>water</item><total>six</total><one>one</one><two>two</two><…
|
| H A D | test_09.XP.out | 24 <one>one</one>
|
| /f-stack/freebsd/contrib/device-tree/Bindings/iio/light/ |
| H A D | us5182d.txt | 20 - upisemi,continuous: This chip has two power modes: one-shot (chip takes one
22 chip takes continuous measurements). The one-shot mode is
25 mode will be used instead of the default one-shot one for
|
| /f-stack/freebsd/contrib/device-tree/Bindings/net/dsa/ |
| H A D | b53.txt | 6 - compatible: For external switch chips, compatible string must be exactly one
20 For the BCM5310x SoCs with an integrated switch, must be one of:
27 For the BCM5831X/BCM1140x SoCs with an integrated switch, must be one of:
35 For the BCM585xx/586XX/88312 SoCs with an integrated switch, must be one of:
44 For the BCM63xx/33xx SoCs with an integrated switch, must be one of:
51 - reg: a total of 3 register base addresses, the first one must be the
53 configuration register and the third one is the SGMII configuration
|
| /f-stack/freebsd/contrib/device-tree/Bindings/net/ |
| H A D | brcm,unimac-mdio.txt | 4 - compatible: should one from "brcm,genet-mdio-v1", "brcm,genet-mdio-v2",
7 - reg: address and length of the register set for the device, first one is the
8 base register, and the second one is optional and for indirect accesses to
15 - interrupts: must be one if the interrupt is shared with the Ethernet MAC or
17 are two separate interrupts, first one must be "mdio done" and second must be
|
| /f-stack/freebsd/contrib/device-tree/Bindings/w1/ |
| H A D | w1-gpio.txt | 6 - gpios: one or two GPIO specs:
7 - the first one is used as data I/O pin
8 - the second one is optional. If specified, it is used as
|
| /f-stack/freebsd/contrib/device-tree/Bindings/powerpc/4xx/ |
| H A D | cpm.txt | 10 one of two different order for the CPM
16 - unused-units : specifier consist of one cell. For each
20 - idle-doze : specifier consist of one cell. For each
24 - standby : specifier consist of one cell. For each
28 - suspend : specifier consist of one cell. For each
|
| /f-stack/freebsd/contrib/device-tree/Bindings/i2c/ |
| H A D | i2c-imx-lpi2c.txt | 5 - "fsl,imx7ulp-lpi2c" for LPI2C compatible with the one integrated on i.MX7ULP soc
6 - "fsl,imx8qxp-lpi2c" for LPI2C compatible with the one integrated on i.MX8QXP soc
7 - "fsl,imx8qm-lpi2c" for LPI2C compatible with the one integrated on i.MX8QM soc
|
| /f-stack/freebsd/contrib/device-tree/Bindings/media/i2c/ |
| H A D | adv7604.txt | 4 HDMI receiver. The ADV7604 has four multiplexed HDMI inputs and one analog
5 input, and the ADV7611 has one HDMI input and no analog input. The 7612 is
12 - compatible: Must contain one of the following
23 detection pins, one per HDMI input. The active flag indicates the GPIO
26 The device node must contain one 'port' child node per device input and output
36 The digital output port node must contain at least one endpoint.
|
| /f-stack/freebsd/contrib/device-tree/Bindings/arm/marvell/ |
| H A D | ap80x-system-controller.txt | 4 The AP806/AP807 is one of the two core HW blocks of the Marvell Armada
31 - compatible: must be one of:
117 may feature several channels, each of them wired to one sensor.
119 It is possible to setup an overheat interrupt by giving at least one
123 - compatible: must be one of:
131 to this IP and represents the channel ID. There is one sensor per
157 - compatible: must be one of:
163 (one per cluster)
|
| /f-stack/freebsd/contrib/device-tree/Bindings/ |
| H A D | graph.txt | 14 have multiple specifiable ports, each of which can be linked to one or more
32 connected to this port. If a single port is connected to more than one
34 If more than one port is present in a device node or there is more than one
92 remote endpoint should contain a 'remote-endpoint' property. If it has one, it
116 If there is more than one 'port' or more than one 'endpoint' node or 'reg'
|
| /f-stack/freebsd/contrib/device-tree/Bindings/rtc/ |
| H A D | armada-380-rtc.txt | 6 - compatible : Should be one of the following:
9 - reg: a list of base address and size pairs, one for each entry in
13 * "rtc-soc" for the SoC related registers and among them the one
|
| /f-stack/freebsd/contrib/device-tree/Bindings/pwm/ |
| H A D | pxa-pwm.txt | 4 - compatible: should be one or more of:
10 Note that one device instance must be created for each PWM that is used, so the
11 length covers only the register window for one PWM output, not that of the
|