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/f-stack/freebsd/contrib/octeon-sdk/
H A Dcvmx-pcmx-defs.h68 #define CVMX_PCMX_DMA_CFG(offset) (CVMX_ADD_IO_SEG(0x0001070000010018ull) + ((offset) & 3) * 16384) argument
83 #define CVMX_PCMX_INT_ENA(offset) (CVMX_ADD_IO_SEG(0x0001070000010020ull) + ((offset) & 3) * 16384) argument
98 #define CVMX_PCMX_INT_SUM(offset) (CVMX_ADD_IO_SEG(0x0001070000010028ull) + ((offset) & 3) * 16384) argument
113 #define CVMX_PCMX_RXADDR(offset) (CVMX_ADD_IO_SEG(0x0001070000010068ull) + ((offset) & 3) * 16384) argument
128 #define CVMX_PCMX_RXCNT(offset) (CVMX_ADD_IO_SEG(0x0001070000010060ull) + ((offset) & 3) * 16384) argument
143 #define CVMX_PCMX_RXMSK0(offset) (CVMX_ADD_IO_SEG(0x00010700000100C0ull) + ((offset) & 3) * 16384) argument
158 #define CVMX_PCMX_RXMSK1(offset) (CVMX_ADD_IO_SEG(0x00010700000100C8ull) + ((offset) & 3) * 16384) argument
173 #define CVMX_PCMX_RXMSK2(offset) (CVMX_ADD_IO_SEG(0x00010700000100D0ull) + ((offset) & 3) * 16384) argument
188 #define CVMX_PCMX_RXMSK3(offset) (CVMX_ADD_IO_SEG(0x00010700000100D8ull) + ((offset) & 3) * 16384) argument
203 #define CVMX_PCMX_RXMSK4(offset) (CVMX_ADD_IO_SEG(0x00010700000100E0ull) + ((offset) & 3) * 16384) argument
[all …]
H A Dcvmx-pip-defs.h248 …EON_CN61XX) && ((offset <= 3) || ((offset >= 16) && (offset <= 19)) || ((offset >= 32) && (offset … in CVMX_PIP_PRT_CFGBX()
249 …offset <= 3) || ((offset >= 16) && (offset <= 19)) || ((offset >= 32) && (offset <= 35)) || ((offs… in CVMX_PIP_PRT_CFGBX()
251 …ON_CNF71XX) && ((offset <= 3) || ((offset >= 16) && (offset <= 19)) || ((offset >= 32) && (offset … in CVMX_PIP_PRT_CFGBX()
267 …EON_CN56XX) && ((offset <= 3) || ((offset >= 16) && (offset <= 19)) || ((offset >= 32) && (offset … in CVMX_PIP_PRT_CFGX()
269 …EON_CN61XX) && ((offset <= 3) || ((offset >= 16) && (offset <= 19)) || ((offset >= 32) && (offset … in CVMX_PIP_PRT_CFGX()
270 …EON_CN63XX) && ((offset <= 3) || ((offset >= 32) && (offset <= 35)) || ((offset >= 36) && (offset … in CVMX_PIP_PRT_CFGX()
271 …offset <= 3) || ((offset >= 16) && (offset <= 19)) || ((offset >= 32) && (offset <= 35)) || ((offs… in CVMX_PIP_PRT_CFGX()
293 …offset <= 3) || ((offset >= 16) && (offset <= 19)) || ((offset >= 32) && (offset <= 35)) || ((offs… in CVMX_PIP_PRT_TAGX()
756 …offset <= 3) || ((offset >= 16) && (offset <= 19)) || ((offset >= 32) && (offset <= 35)) || ((offs… in CVMX_PIP_STAT_INB_ERRSX()
788 …offset <= 3) || ((offset >= 16) && (offset <= 19)) || ((offset >= 32) && (offset <= 35)) || ((offs… in CVMX_PIP_STAT_INB_OCTSX()
[all …]
H A Dcvmx-mixx-defs.h69 #define CVMX_MIXX_BIST(offset) (CVMX_ADD_IO_SEG(0x0001070000100078ull) + ((offset) & 1) * 2048) argument
85 #define CVMX_MIXX_CTL(offset) (CVMX_ADD_IO_SEG(0x0001070000100020ull) + ((offset) & 1) * 2048) argument
101 #define CVMX_MIXX_INTENA(offset) (CVMX_ADD_IO_SEG(0x0001070000100050ull) + ((offset) & 1) * 2048) argument
117 #define CVMX_MIXX_IRCNT(offset) (CVMX_ADD_IO_SEG(0x0001070000100030ull) + ((offset) & 1) * 2048) argument
133 #define CVMX_MIXX_IRHWM(offset) (CVMX_ADD_IO_SEG(0x0001070000100028ull) + ((offset) & 1) * 2048) argument
149 #define CVMX_MIXX_IRING1(offset) (CVMX_ADD_IO_SEG(0x0001070000100010ull) + ((offset) & 1) * 2048) argument
165 #define CVMX_MIXX_IRING2(offset) (CVMX_ADD_IO_SEG(0x0001070000100018ull) + ((offset) & 1) * 2048) argument
181 #define CVMX_MIXX_ISR(offset) (CVMX_ADD_IO_SEG(0x0001070000100048ull) + ((offset) & 1) * 2048) argument
197 #define CVMX_MIXX_ORCNT(offset) (CVMX_ADD_IO_SEG(0x0001070000100040ull) + ((offset) & 1) * 2048) argument
213 #define CVMX_MIXX_ORHWM(offset) (CVMX_ADD_IO_SEG(0x0001070000100038ull) + ((offset) & 1) * 2048) argument
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H A Dcvmx-agl-defs.h113 #define CVMX_AGL_GMX_PRTX_CFG(offset) (CVMX_ADD_IO_SEG(0x00011800E0000010ull) + ((offset) & 1) * 20… argument
129 #define CVMX_AGL_GMX_RXX_ADR_CAM0(offset) (CVMX_ADD_IO_SEG(0x00011800E0000180ull) + ((offset) & 1) … argument
145 #define CVMX_AGL_GMX_RXX_ADR_CAM1(offset) (CVMX_ADD_IO_SEG(0x00011800E0000188ull) + ((offset) & 1) … argument
161 #define CVMX_AGL_GMX_RXX_ADR_CAM2(offset) (CVMX_ADD_IO_SEG(0x00011800E0000190ull) + ((offset) & 1) … argument
337 #define CVMX_AGL_GMX_RXX_IFG(offset) (CVMX_ADD_IO_SEG(0x00011800E0000058ull) + ((offset) & 1) * 204… argument
623 #define CVMX_AGL_GMX_RX_BP_OFFX(offset) (CVMX_ADD_IO_SEG(0x00011800E0000460ull) + ((offset) & 1) * … argument
639 #define CVMX_AGL_GMX_RX_BP_ONX(offset) (CVMX_ADD_IO_SEG(0x00011800E0000440ull) + ((offset) & 1) * 8) argument
677 #define CVMX_AGL_GMX_SMACX(offset) (CVMX_ADD_IO_SEG(0x00011800E0000230ull) + ((offset) & 1) * 2048) argument
718 #define CVMX_AGL_GMX_TXX_CLK(offset) (CVMX_ADD_IO_SEG(0x00011800E0000208ull) + ((offset) & 1) * 204… argument
734 #define CVMX_AGL_GMX_TXX_CTL(offset) (CVMX_ADD_IO_SEG(0x00011800E0000270ull) + ((offset) & 1) * 204… argument
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H A Dcvmx-pcsx-defs.h59 if (((offset <= 1)) && ((block_id == 0))) in CVMX_PCSX_ANX_ADV_REG()
64 if (((offset <= 3)) && ((block_id == 0))) in CVMX_PCSX_ANX_ADV_REG()
70 if (((offset <= 3)) && ((block_id <= 1))) in CVMX_PCSX_ANX_ADV_REG()
74 if (((offset <= 3)) && ((block_id <= 4))) in CVMX_PCSX_ANX_ADV_REG()
85 if (((offset <= 1)) && ((block_id == 0))) in CVMX_PCSX_ANX_EXT_ST_REG()
90 if (((offset <= 3)) && ((block_id == 0))) in CVMX_PCSX_ANX_EXT_ST_REG()
96 if (((offset <= 3)) && ((block_id <= 1))) in CVMX_PCSX_ANX_EXT_ST_REG()
100 if (((offset <= 3)) && ((block_id <= 4))) in CVMX_PCSX_ANX_EXT_ST_REG()
111 if (((offset <= 1)) && ((block_id == 0))) in CVMX_PCSX_ANX_LP_ABIL_REG()
116 if (((offset <= 3)) && ((block_id == 0))) in CVMX_PCSX_ANX_LP_ABIL_REG()
[all …]
H A Dcvmx-pexp-defs.h62 #define CVMX_PEXP_NPEI_BAR1_INDEXX(offset) (CVMX_ADD_IO_SEG(0x00011F0000008000ull) + ((offset) & 31… argument
195 #define CVMX_PEXP_NPEI_DMAX_COUNTS(offset) (CVMX_ADD_IO_SEG(0x00011F0000008450ull) + ((offset) & 7)… argument
207 #define CVMX_PEXP_NPEI_DMAX_DBELL(offset) (CVMX_ADD_IO_SEG(0x00011F00000083B0ull) + ((offset) & 7) … argument
231 #define CVMX_PEXP_NPEI_DMAX_NADDR(offset) (CVMX_ADD_IO_SEG(0x00011F00000084A0ull) + ((offset) & 7) … argument
418 (OCTEON_IS_MODEL(OCTEON_CN52XX) && (((offset >= 12) && (offset <= 27)))) || in CVMX_PEXP_NPEI_MEM_ACCESS_SUBIDX()
419 (OCTEON_IS_MODEL(OCTEON_CN56XX) && (((offset >= 12) && (offset <= 27)))))) in CVMX_PEXP_NPEI_MEM_ACCESS_SUBIDX()
1384 (OCTEON_IS_MODEL(OCTEON_CN61XX) && (((offset >= 12) && (offset <= 27)))) || in CVMX_PEXP_SLI_MEM_ACCESS_SUBIDX()
1385 (OCTEON_IS_MODEL(OCTEON_CN63XX) && (((offset >= 12) && (offset <= 27)))) || in CVMX_PEXP_SLI_MEM_ACCESS_SUBIDX()
1386 (OCTEON_IS_MODEL(OCTEON_CN66XX) && (((offset >= 12) && (offset <= 27)))) || in CVMX_PEXP_SLI_MEM_ACCESS_SUBIDX()
1387 (OCTEON_IS_MODEL(OCTEON_CN68XX) && (((offset >= 12) && (offset <= 27)))) || in CVMX_PEXP_SLI_MEM_ACCESS_SUBIDX()
[all …]
H A Dcvmx-ilk-defs.h163 #define CVMX_ILK_RXX_CFG0(offset) (CVMX_ADD_IO_SEG(0x0001180014020000ull) + ((offset) & 1) * 16384) argument
174 #define CVMX_ILK_RXX_CFG1(offset) (CVMX_ADD_IO_SEG(0x0001180014020008ull) + ((offset) & 1) * 16384) argument
240 #define CVMX_ILK_RXX_INT(offset) (CVMX_ADD_IO_SEG(0x0001180014020010ull) + ((offset) & 1) * 16384) argument
251 #define CVMX_ILK_RXX_INT_EN(offset) (CVMX_ADD_IO_SEG(0x0001180014020018ull) + ((offset) & 1) * 1638… argument
262 #define CVMX_ILK_RXX_JABBER(offset) (CVMX_ADD_IO_SEG(0x00011800140200B8ull) + ((offset) & 1) * 1638… argument
317 #define CVMX_ILK_RXX_RID(offset) (CVMX_ADD_IO_SEG(0x00011800140200C0ull) + ((offset) & 1) * 16384) argument
328 #define CVMX_ILK_RXX_STAT0(offset) (CVMX_ADD_IO_SEG(0x0001180014020020ull) + ((offset) & 1) * 16384) argument
339 #define CVMX_ILK_RXX_STAT1(offset) (CVMX_ADD_IO_SEG(0x0001180014020028ull) + ((offset) & 1) * 16384) argument
350 #define CVMX_ILK_RXX_STAT2(offset) (CVMX_ADD_IO_SEG(0x0001180014020030ull) + ((offset) & 1) * 16384) argument
614 #define CVMX_ILK_TXX_DBG(offset) (CVMX_ADD_IO_SEG(0x0001180014010070ull) + ((offset) & 1) * 16384) argument
[all …]
H A Dcvmx-pcm-defs.h59 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((offset <= 1))) || in CVMX_PCM_CLKX_CFG()
60 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((offset <= 1))) || in CVMX_PCM_CLKX_CFG()
61 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((offset <= 1))) || in CVMX_PCM_CLKX_CFG()
62 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((offset <= 1))) || in CVMX_PCM_CLKX_CFG()
63 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((offset <= 1))))) in CVMX_PCM_CLKX_CFG()
68 #define CVMX_PCM_CLKX_CFG(offset) (CVMX_ADD_IO_SEG(0x0001070000010000ull) + ((offset) & 1) * 16384) argument
74 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((offset <= 1))) || in CVMX_PCM_CLKX_DBG()
75 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((offset <= 1))) || in CVMX_PCM_CLKX_DBG()
76 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((offset <= 1))) || in CVMX_PCM_CLKX_DBG()
83 #define CVMX_PCM_CLKX_DBG(offset) (CVMX_ADD_IO_SEG(0x0001070000010038ull) + ((offset) & 1) * 16384) argument
[all …]
H A Dcvmx-gmxx-defs.h274 if (((offset == 0)) && ((block_id == 0))) in CVMX_GMXX_PRTX_CBFC_CTL()
280 if (((offset == 0)) && ((block_id <= 1))) in CVMX_GMXX_PRTX_CBFC_CTL()
284 if (((offset == 0)) && ((block_id <= 4))) in CVMX_GMXX_PRTX_CBFC_CTL()
295 if (((offset <= 1)) && ((block_id == 0))) in CVMX_GMXX_PRTX_CFG()
300 if (((offset <= 2)) && ((block_id == 0))) in CVMX_GMXX_PRTX_CFG()
305 if (((offset <= 3)) && ((block_id == 0))) in CVMX_GMXX_PRTX_CFG()
313 if (((offset <= 3)) && ((block_id <= 1))) in CVMX_GMXX_PRTX_CFG()
317 if (((offset <= 2)) && ((block_id == 0))) in CVMX_GMXX_PRTX_CFG()
321 if (((offset <= 3)) && ((block_id <= 4))) in CVMX_GMXX_PRTX_CFG()
345 if (((offset <= 3)) && ((block_id == 0))) in CVMX_GMXX_RXX_ADR_CAM0()
[all …]
H A Dcvmx-ipd-defs.h217 …OCTEON_IS_MODEL(OCTEON_CN56XX) && ((offset <= 3) || ((offset >= 16) && (offset <= 19)) || ((offset… in CVMX_IPD_PORTX_BP_PAGE_CNT()
219 …OCTEON_IS_MODEL(OCTEON_CN61XX) && ((offset <= 3) || ((offset >= 16) && (offset <= 19)) || ((offset… in CVMX_IPD_PORTX_BP_PAGE_CNT()
221 …OCTEON_IS_MODEL(OCTEON_CN66XX) && ((offset <= 3) || ((offset >= 16) && (offset <= 19)) || ((offset… in CVMX_IPD_PORTX_BP_PAGE_CNT()
222 …CTEON_IS_MODEL(OCTEON_CNF71XX) && ((offset <= 3) || ((offset >= 16) && (offset <= 19)) || ((offset… in CVMX_IPD_PORTX_BP_PAGE_CNT()
311 …OCTEON_IS_MODEL(OCTEON_CN56XX) && ((offset <= 3) || ((offset >= 16) && (offset <= 19)) || ((offset… in CVMX_IPD_PORT_BP_COUNTERS_PAIRX()
313 …OCTEON_IS_MODEL(OCTEON_CN61XX) && ((offset <= 3) || ((offset >= 16) && (offset <= 19)) || ((offset… in CVMX_IPD_PORT_BP_COUNTERS_PAIRX()
315 …OCTEON_IS_MODEL(OCTEON_CN66XX) && ((offset <= 3) || ((offset >= 16) && (offset <= 19)) || ((offset… in CVMX_IPD_PORT_BP_COUNTERS_PAIRX()
316 …CTEON_IS_MODEL(OCTEON_CNF71XX) && ((offset <= 3) || ((offset >= 16) && (offset <= 19)) || ((offset… in CVMX_IPD_PORT_BP_COUNTERS_PAIRX()
373 …TEON_IS_MODEL(OCTEON_CN56XX) && ((offset <= 31) || ((offset >= 128) && (offset <= 159)) || ((offse… in CVMX_IPD_PORT_QOS_X_CNT()
374 …TEON_IS_MODEL(OCTEON_CN61XX) && ((offset <= 31) || ((offset >= 128) && (offset <= 159)) || ((offse… in CVMX_IPD_PORT_QOS_X_CNT()
[all …]
H A Dcvmx-smix-defs.h63 if ((offset == 0)) in CVMX_SMIX_CLK()
72 if ((offset <= 1)) in CVMX_SMIX_CLK()
76 if ((offset <= 3)) in CVMX_SMIX_CLK()
91 if ((offset == 0)) in CVMX_SMIX_CMD()
100 if ((offset <= 1)) in CVMX_SMIX_CMD()
104 if ((offset <= 3)) in CVMX_SMIX_CMD()
119 if ((offset == 0)) in CVMX_SMIX_EN()
128 if ((offset <= 1)) in CVMX_SMIX_EN()
132 if ((offset <= 3)) in CVMX_SMIX_EN()
147 if ((offset == 0)) in CVMX_SMIX_RD_DAT()
[all …]
H A Dcvmx-dpi-defs.h90 #define CVMX_DPI_DMAX_COUNTS(offset) (CVMX_ADD_IO_SEG(0x0001DF0000000300ull) + ((offset) & 7) * 8) argument
105 #define CVMX_DPI_DMAX_DBELL(offset) (CVMX_ADD_IO_SEG(0x0001DF0000000200ull) + ((offset) & 7) * 8) argument
148 #define CVMX_DPI_DMAX_IFLIGHT(offset) (CVMX_ADD_IO_SEG(0x0001DF0000000A00ull) + ((offset) & 7) * 8) argument
163 #define CVMX_DPI_DMAX_NADDR(offset) (CVMX_ADD_IO_SEG(0x0001DF0000000380ull) + ((offset) & 7) * 8) argument
219 #define CVMX_DPI_DMA_ENGX_EN(offset) (CVMX_ADD_IO_SEG(0x0001DF0000000080ull) + ((offset) & 7) * 8) argument
247 #define CVMX_DPI_ENGX_BUF(offset) (CVMX_ADD_IO_SEG(0x0001DF0000000880ull) + ((offset) & 7) * 8) argument
403 if ((offset <= 3)) in CVMX_DPI_SLI_PRTX_ERR()
411 if ((offset <= 1)) in CVMX_DPI_SLI_PRTX_ERR()
414 if ((offset <= 1)) in CVMX_DPI_SLI_PRTX_ERR()
416 if ((offset <= 1)) in CVMX_DPI_SLI_PRTX_ERR()
[all …]
H A Dcvmx-asm.h199 #define CVMX_PREFETCH(address, offset) CVMX_PREFETCH_PREF0(address, offset) argument
202 #define CVMX_PREFETCH_PREF0(address, offset) CVMX_PREFETCH_PREFX(0, address, offset) argument
203 #define CVMX_PREFETCH_PREF1(address, offset) CVMX_PREFETCH_PREFX(1, address, offset) argument
204 #define CVMX_PREFETCH_PREF6(address, offset) CVMX_PREFETCH_PREFX(6, address, offset) argument
210 #define CVMX_PREFETCH_L2(address, offset) CVMX_PREFETCH_PREFX(28, address, offset) argument
642 …[rbase] "d" (__a), "m"(__a[offset + 0]), "m"(__a[offset + 1]), "m"(__a[offset + 2]), "m"(__a[offse…
646 … "=m"(__a[offset + 0]), "=m"(__a[offset + 1]), "=m"(__a[offset + 2]), "=m"(__a[offset + 3]) : \
652 …[rbase] "d" (__a), "m"(__a[offset + 0]), "m"(__a[offset + 1]), "m"(__a[offset + 2]), "m"(__a[offse…
653 "m"(__a[offset + 4]), "m"(__a[offset + 5]), "m"(__a[offset + 6]), "m"(__a[offset + 7])); }
657 … "=m"(__a[offset + 0]), "=m"(__a[offset + 1]), "=m"(__a[offset + 2]), "=m"(__a[offset + 3]), \
[all …]
H A Dcvmx-mio-defs.h82 #define CVMX_MIO_BOOT_DMA_CFGX(offset) (CVMX_ADD_IO_SEG(0x0001180000000100ull) + ((offset) & 3) * 8) argument
99 #define CVMX_MIO_BOOT_DMA_INTX(offset) (CVMX_ADD_IO_SEG(0x0001180000000138ull) + ((offset) & 3) * 8) argument
116 #define CVMX_MIO_BOOT_DMA_INT_ENX(offset) (CVMX_ADD_IO_SEG(0x0001180000000150ull) + ((offset) & 3) … argument
133 #define CVMX_MIO_BOOT_DMA_TIMX(offset) (CVMX_ADD_IO_SEG(0x0001180000000120ull) + ((offset) & 3) * 8) argument
158 #define CVMX_MIO_BOOT_LOC_CFGX(offset) (CVMX_ADD_IO_SEG(0x0001180000000080ull) + ((offset) & 1) * 8) argument
192 #define CVMX_MIO_BOOT_REG_CFGX(offset) (CVMX_ADD_IO_SEG(0x0001180000000000ull) + ((offset) & 7) * 8) argument
214 #define CVMX_MIO_BOOT_REG_TIMX(offset) (CVMX_ADD_IO_SEG(0x0001180000000040ull) + ((offset) & 7) * 8) argument
304 #define CVMX_MIO_EMM_MODEX(offset) (CVMX_ADD_IO_SEG(0x0001180000002008ull) + ((offset) & 3) * 8) argument
775 #define CVMX_MIO_QLMX_CFG(offset) (CVMX_ADD_IO_SEG(0x0001180000001590ull) + ((offset) & 7) * 8) argument
822 #define CVMX_MIO_RST_CNTLX(offset) (CVMX_ADD_IO_SEG(0x0001180000001648ull) + ((offset) & 3) * 8) argument
[all …]
H A Dcvmx-led-defs.h147 (OCTEON_IS_MODEL(OCTEON_CN38XX) && ((offset <= 7))) || in CVMX_LED_PRT_STATUSX()
149 (OCTEON_IS_MODEL(OCTEON_CN58XX) && ((offset <= 7))))) in CVMX_LED_PRT_STATUSX()
154 #define CVMX_LED_PRT_STATUSX(offset) (CVMX_ADD_IO_SEG(0x0001180000001A80ull) + ((offset) & 7) * 8) argument
162 (OCTEON_IS_MODEL(OCTEON_CN58XX) && ((offset <= 1))))) in CVMX_LED_UDD_CNTX()
167 #define CVMX_LED_UDD_CNTX(offset) (CVMX_ADD_IO_SEG(0x0001180000001A20ull) + ((offset) & 1) * 8) argument
175 (OCTEON_IS_MODEL(OCTEON_CN58XX) && ((offset <= 1))))) in CVMX_LED_UDD_DATX()
180 #define CVMX_LED_UDD_DATX(offset) (CVMX_ADD_IO_SEG(0x0001180000001A38ull) + ((offset) & 1) * 8) argument
188 (OCTEON_IS_MODEL(OCTEON_CN58XX) && ((offset <= 1))))) in CVMX_LED_UDD_DAT_CLRX()
193 #define CVMX_LED_UDD_DAT_CLRX(offset) (CVMX_ADD_IO_SEG(0x0001180000001AC8ull) + ((offset) & 1) * 16) argument
201 (OCTEON_IS_MODEL(OCTEON_CN58XX) && ((offset <= 1))))) in CVMX_LED_UDD_DAT_SETX()
[all …]
H A Dcvmx-ixf18201.c217 int offset; in cvmx_ixf18201_init() local
271 offset = 0x500 * index; in cvmx_ixf18201_init()
273 cvmx_ixf18201_write16(0x3005 + offset, 0x0040); in cvmx_ixf18201_init()
274 cvmx_ixf18201_write16(0x3006 + offset, 0); in cvmx_ixf18201_init()
298 offset = 0x500 * index; in cvmx_ixf18201_init()
303 cvmx_ixf18201_write16(0x3000 + offset, 0x0060); in cvmx_ixf18201_init()
304 cvmx_ixf18201_write16(0x3002 + offset, 0x0040); in cvmx_ixf18201_init()
305 cvmx_ixf18201_write16(0x3003 + offset, 0x0000); in cvmx_ixf18201_init()
306 cvmx_ixf18201_write16(0x30c2 + offset, 0x0060); in cvmx_ixf18201_init()
307 cvmx_ixf18201_write16(0x300a + offset, 0x0000); in cvmx_ixf18201_init()
[all …]
/f-stack/freebsd/contrib/libfdt/
H A Dfdt.c87 if (((offset + len) < offset) in fdt_offset_ptr()
128 offset += 4; in fdt_next_tag()
149 if ((offset < 0) || (offset % FDT_TAGSIZE) in fdt_check_node_offset_()
153 return offset; in fdt_check_node_offset_()
158 if ((offset < 0) || (offset % FDT_TAGSIZE) in fdt_check_prop_offset_()
159 || (fdt_next_tag(fdt, offset, &offset) != FDT_PROP)) in fdt_check_prop_offset_()
162 return offset; in fdt_check_prop_offset_()
202 return offset; in fdt_next_node()
209 offset = fdt_next_node(fdt, offset, &depth); in fdt_first_subnode()
213 return offset; in fdt_first_subnode()
[all …]
H A Dfdt_ro.c95 int offset; in fdt_get_max_phandle() local
98 offset = fdt_next_node(fdt, offset, NULL)) { in fdt_get_max_phandle()
168 offset = fdt_next_node(fdt, offset, &depth)) in fdt_subnode_offset_namelen()
471 (offset >= 0) && (offset <= nodeoffset); in fdt_get_path()
472 offset = fdt_next_node(fdt, offset, &depth)) { in fdt_get_path()
503 if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0)) in fdt_get_path()
523 (offset >= 0) && (offset <= nodeoffset); in fdt_supernode_atdepth_offset()
524 offset = fdt_next_node(fdt, offset, &depth)) { in fdt_supernode_atdepth_offset()
585 offset = fdt_next_node(fdt, offset, NULL)) { in fdt_node_offset_by_prop_value()
612 offset = fdt_next_node(fdt, offset, NULL)) { in fdt_node_offset_by_phandle()
[all …]
/f-stack/freebsd/mips/nlm/
H A Dbus_space_rmi_pci.c69 bus_size_t offset);
74 bus_size_t offset);
79 bus_size_t offset);
135 bus_size_t offset,
142 bus_size_t offset,
149 bus_size_t offset,
156 bus_size_t offset,
163 bus_size_t offset,
235 bus_size_t offset,
242 bus_size_t offset,
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H A Dbus_space_rmi.c69 bus_size_t offset);
74 bus_size_t offset);
79 bus_size_t offset);
135 bus_size_t offset,
142 bus_size_t offset,
149 bus_size_t offset,
156 bus_size_t offset,
163 bus_size_t offset,
232 bus_size_t offset,
238 bus_size_t offset,
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/f-stack/freebsd/mips/cavium/
H A Doctopci_bus_space.c233 *bshp = handle + offset; in octopci_bs_subregion()
239 bus_size_t offset) in octopci_bs_r_1() argument
242 return (rd8(handle + offset)); in octopci_bs_r_1()
247 bus_size_t offset) in octopci_bs_r_2() argument
250 return (rd16(handle + offset)); in octopci_bs_r_2()
255 bus_size_t offset) in octopci_bs_r_4() argument
258 return (rd32(handle + offset)); in octopci_bs_r_4()
267 *addr++ = rd8(bsh + offset); in octopci_bs_rm_1()
340 wr8(bsh + offset, value); in octopci_bs_w_1()
348 wr16(bsh + offset, value); in octopci_bs_w_2()
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/f-stack/dpdk/lib/librte_eal/common/
H A Deal_common_trace_ctf.c34 int count = *offset; in meta_copy()
50 *offset = count; in meta_copy()
101 return meta_copy(meta, offset, str, rc); in meta_data_type_emit()
134 return meta_copy(meta, offset, str, rc); in meta_header_emit()
138 meta_env_emit(char **meta, int *offset) in meta_env_emit() argument
248 int rc, offset = 0; in trace_metadata_create() local
255 rc = meta_header_emit(&meta, &offset); in trace_metadata_create()
259 rc = meta_env_emit(&meta, &offset); in trace_metadata_create()
266 trace->ctf_meta_offset_freq = offset; in trace_metadata_create()
282 rc = meta_stream_emit(&meta, &offset); in trace_metadata_create()
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/f-stack/freebsd/mips/mips/
H A Dbus_space_generic.c248 *bshp = handle + offset; in generic_bs_subregion()
270 bus_size_t offset) in generic_bs_r_1() argument
273 return (rd8(handle + offset)); in generic_bs_r_1()
278 bus_size_t offset) in generic_bs_r_2() argument
286 bus_size_t offset) in generic_bs_r_4() argument
297 return(rd64(handle + offset)); in generic_bs_r_8()
309 *addr++ = rd8(bsh + offset); in generic_bs_rm_1()
412 wr8(bsh + offset, value); in generic_bs_w_1()
420 wr16(bsh + offset, value); in generic_bs_w_2()
428 wr32(bsh + offset, value); in generic_bs_w_4()
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/f-stack/freebsd/contrib/device-tree/include/dt-bindings/clock/
H A Dam3.h9 #define AM3_CLKCTRL_INDEX(offset) ((offset) - AM3_CLKCTRL_OFFSET) argument
15 #define AM3_L4_PER_CLKCTRL_INDEX(offset) ((offset) - AM3_L4_PER_CLKCTRL_OFFSET) argument
70 #define AM3_L4_WKUP_CLKCTRL_INDEX(offset) ((offset) - AM3_L4_WKUP_CLKCTRL_OFFSET) argument
86 #define AM3_MPU_CLKCTRL_INDEX(offset) ((offset) - AM3_MPU_CLKCTRL_OFFSET) argument
94 #define AM3_GFX_L3_CLKCTRL_INDEX(offset) ((offset) - AM3_GFX_L3_CLKCTRL_OFFSET) argument
106 #define AM3_L4LS_CLKCTRL_INDEX(offset) ((offset) - AM3_L4LS_CLKCTRL_OFFSET) argument
141 #define AM3_L3S_CLKCTRL_INDEX(offset) ((offset) - AM3_L3S_CLKCTRL_OFFSET) argument
150 #define AM3_L3_CLKCTRL_INDEX(offset) ((offset) - AM3_L3_CLKCTRL_OFFSET) argument
164 #define AM3_L4HS_CLKCTRL_INDEX(offset) ((offset) - AM3_L4HS_CLKCTRL_OFFSET) argument
177 #define AM3_LCDC_CLKCTRL_INDEX(offset) ((offset) - AM3_LCDC_CLKCTRL_OFFSET) argument
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/f-stack/freebsd/x86/include/
H A Dbus.h171 *nbshp = bsh + offset; in bus_space_subregion()
203 bus_size_t offset);
207 bus_size_t offset);
211 bus_size_t offset);
216 bus_size_t offset);
221 bus_size_t offset) in bus_space_read_1() argument
231 bus_size_t offset) in bus_space_read_2() argument
241 bus_size_t offset) in bus_space_read_4() argument
252 bus_size_t offset) in bus_space_read_8() argument
737 bus_size_t offset,
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